wf_fd_receiver.vhd 13.5 KB
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--_________________________________________________________________________________________________
--                                                                                                |
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--                                         |The nanoFIP|                                          |
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--                                                                                                |
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--                                         CERN,BE/CO-HT                                          |
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--________________________________________________________________________________________________|

---------------------------------------------------------------------------------------------------
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--                                                                                                |
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--                                         wf_fd_receiver                                         |
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--                                                                                                |
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---------------------------------------------------------------------------------------------------
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-- File         wf_fd_receiver.vhd                                                                |
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--                                                                                                |
-- Description  The unit groups the main actions that regard FIELDRIVE data reception.            |
--              It instantiates the units:                                                        |
--                                                                                                |
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--              o wf_rx_deserializer: for the formation of bytes of data to be provided to the:   |
--                                    o wf_engine_control unit, for the contents of ID_DAT frames |
--                                    o wf_cons_bytes_processor unit, for the contents of consumed|
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--                                      RP_DAT frames                                             |
--                                                                                                |
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--              o wf_rx_osc         : for the clock recovery                                      |
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--                                                                                                |
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--              o wf_rx_deglitcher  : for the filtering of the input FD_RXD                       |
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--                                                                                                |
--                                                                                                |
--                     _________________________         _________________________                |
--                    |                         |       |                         |               |
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--                    |      wf_Consumption     |       |    wf_engine_control    |               |
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--                    |_________________________|       |_________________________|               |
--                                /\                                /\                            |
--                     ___________________________________________________________                |
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--                    |                      wf_fd_revceiver                      |               |
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--                    |                                                _________  |               |
--                    |   _______________________________________     |         | |               |
--                    |  |                                       |    |         | |               |
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--                    |  |           wf_rx_deserializer          |    |  wf_rx  | |               |
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--                    |  |                                       |  < |  _osc   | |               |
--                    |  |_______________________________________|    |         | |               |
--                    |                     /\                        |_________| |               |
--                    |   _______________________________________                 |               |
--                    |  |                                       |                |               |
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--                    |  |            wf_rx_deglitcher           |                |               |
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--                    |  |_______________________________________|                |               |
--                    |                                                           |               |
--                    |___________________________________________________________|               |
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--                                                 /\                                             |
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--              ___________________________________________________________________               |
--               0_____________________________FIELDBUS______________________________O            |
--                                                                                                |
--                                                                                                |
-- Authors      Pablo Alvarez Sanchez (Pablo.Alvarez.Sanchez@cern.ch)                             |
--              Evangelia Gousiou     (Evangelia.Gousiou@cern.ch)                                 |
-- Date         15/02/2011                                                                        |
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---------------------------------------------------------------------------------------------------

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--                                      SOLDERPAD LICENSE                                         |
--                                   Copyright CERN 2014-2018                                     |
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--                              ------------------------------------                              |
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-- Copyright and related rights are licensed under the Solderpad Hardware License, Version 2.0    |
-- (the "License"); you may not use this file except in compliance with the License.              |
-- You may obtain a copy of the License at http://solderpad.org/licenses/SHL-2.0.                 |
-- Unless required by applicable law or agreed to in writing, software, hardware and materials    |
-- distributed under this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR       |
-- CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language   |
-- governing permissions and limitations under the License.                                       |
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---------------------------------------------------------------------------------------------------
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--=================================================================================================
--                                       Libraries & Packages
--=================================================================================================

-- Standard library
library IEEE;
use IEEE.STD_LOGIC_1164.all; -- std_logic definitions
use IEEE.NUMERIC_STD.all;    -- conversion functions
-- Specific library
library work;
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use work.WF_PACKAGE.all;     -- definitions of types, constants, entities
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--=================================================================================================
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--                              Entity declaration for wf_fd_receiver
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--=================================================================================================
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entity wf_fd_receiver is port(
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  -- INPUTS
    -- nanoFIP User Interface, General signals
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    uclk_i                : in std_logic;  -- 40 MHZ clock
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    -- nanoFIP WorldFIP Settings
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    rate_i                : in std_logic_vector (1 downto 0);  -- WorldFIP bit rate
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    -- nanoFIP FIELDRIVE
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    fd_rxd_a_i            : in std_logic;  -- receiver data
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    -- Signal from the wf_reset_unit
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    nfip_rst_i            : in std_logic;  -- nanoFIP internal reset
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    -- Signal from the wf_engine_control unit
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    rx_rst_i              : in std_logic;  -- reset during production or
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                                           -- reset pulse when during reception a frame is rejected
                                           -- by the engine_control (example: ID_DAT > 8 bytes, 
                                           -- RP_DAT > 133 bytes, wrong ID_DAT CTRL/ VAR/ SUBS bytes)
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  -- OUTPUTS
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    -- Signals to the wf_engine_control and wf_consumption
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    rx_byte_o             : out std_logic_vector (7 downto 0); -- retrieved data byte
    rx_byte_ready_p_o     : out std_logic; -- pulse indicating a new retrieved data byte
    rx_fss_crc_fes_ok_p_o : out std_logic; -- indication of a frame (ID_DAT or RP_DAT) with
                                           -- correct FSS, FES & CRC; pulse upon FES detection
    rx_crc_wrong_p_o      : out std_logic; -- indication of a frame (ID_DAT or RP_DAT) with
                                           -- wrong CRC; pulse upon FES detection
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    -- Signals to the wf_engine_control
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    rx_fss_received_p_o   : out std_logic);-- pulse upon FSS detection (ID/ RP_DAT)

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end entity wf_fd_receiver;
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--=================================================================================================
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--                                    architecture declaration
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--=================================================================================================
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architecture struc of wf_fd_receiver is
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  signal s_rx_osc_rst, s_adjac_bits_window, s_signif_edge_window : std_logic;
  signal s_sample_bit_p, s_sample_manch_bit_p                    : std_logic;
  signal s_fd_rxd_filt, s_rxd_filt_edge_p                        : std_logic;
  signal s_fd_rxd_filt_f_edge_p, s_fd_rxd_filt_r_edge_p          : std_logic;
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--=================================================================================================
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--                                       architecture begin
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--=================================================================================================
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begin


---------------------------------------------------------------------------------------------------
--                                          Deglitcher                                           --
---------------------------------------------------------------------------------------------------

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  FIELDRIVE_Receiver_Deglitcher: wf_rx_deglitcher
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  port map(
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    uclk_i                 => uclk_i,
    nfip_rst_i             => nfip_rst_i,
    fd_rxd_a_i             => fd_rxd_a_i,
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  -----------------------------------------------------------------
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    fd_rxd_filt_o          => s_fd_rxd_filt,
    fd_rxd_filt_edge_p_o   => s_rxd_filt_edge_p,
    fd_rxd_filt_f_edge_p_o => s_fd_rxd_filt_f_edge_p);
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  -----------------------------------------------------------------

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    s_fd_rxd_filt_r_edge_p <= s_rxd_filt_edge_p and (not s_fd_rxd_filt_f_edge_p);
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---------------------------------------------------------------------------------------------------
--                                          Oscillator                                           --
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---------------------------------------------------------------------------------------------------
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  FIELDRIVE_Receiver_Oscillator: wf_rx_osc
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  port map(
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    uclk_i                  => uclk_i,
    rate_i                  => rate_i,
    nfip_rst_i              => nfip_rst_i,
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    fd_rxd_edge_p_i         => s_rxd_filt_edge_p,
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    rx_osc_rst_i            => s_rx_osc_rst,
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  -----------------------------------------------------------------
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    rx_manch_clk_p_o        => s_sample_manch_bit_p,
    rx_bit_clk_p_o          => s_sample_bit_p,
    rx_signif_edge_window_o => s_signif_edge_window,
    rx_adjac_bits_window_o  => s_adjac_bits_window);
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  -----------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
--                                         Deserializer                                          --
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---------------------------------------------------------------------------------------------------
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  FIELDRIVE_Receiver_Deserializer: wf_rx_deserializer
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  port map(
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    uclk_i                  => uclk_i,
    nfip_rst_i              => nfip_rst_i,
    rx_rst_i                => rx_rst_i,
    sample_bit_p_i          => s_sample_bit_p,
    sample_manch_bit_p_i    => s_sample_manch_bit_p,
    signif_edge_window_i    => s_signif_edge_window,
    adjac_bits_window_i     => s_adjac_bits_window,
    fd_rxd_f_edge_p_i       => s_fd_rxd_filt_f_edge_p,
    fd_rxd_r_edge_p_i       => s_fd_rxd_filt_r_edge_p,
    fd_rxd_i                => s_fd_rxd_filt,
  -----------------------------------------------------------------
    byte_ready_p_o          => rx_byte_ready_p_o,
    byte_o                  => rx_byte_o,
    fss_crc_fes_ok_p_o      => rx_fss_crc_fes_ok_p_o,
    rx_osc_rst_o            => s_rx_osc_rst,
    fss_received_p_o        => rx_fss_received_p_o,
    crc_wrong_p_o           => rx_crc_wrong_p_o);
  -----------------------------------------------------------------
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end architecture struc;

--=================================================================================================
--                                        architecture end
--=================================================================================================
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--                                      E N D   O F   F I L E
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