small change in top-level comments; code not touched!

git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@255 7f0067c9-7624-46c7-bd39-3fb5400c0213

small change in top-level comments; code not touched!
git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@255 7f0067c9-7624-46c7-bd39-3fb5400c0213
25f5c1c9 · egousiou · d93a7434 · 25f5c1c9
Commit 25f5c1c9 authored Jan 18, 2012 by egousiou
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nanofip.vhd nanofip.vhd +0 -3

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 -- ProASIC3 Flash family FPGA (130nm CMOS technology) that offers an inherent resistance to       |
 -- radiation: it is immune to Single Event Latchups for the LHC environment, it has high tolerance|
 -- to Total Ionizing Dose effects (>300 Gy) and its configuration memory is not disturbed by SEUs.|
-- Another feature that nanoFIP offers is the possibility to reprogram the user logic FPGA through|
-- JTAG interface; WorldFIP frames are translated to the equivalent JTAG signals that drive and   |
-- monitor the user logic Test Access Port controller (TAP).                                      |
 -- nanoFIP is used in conjunction with a FIELDRIVE chip and FIELDTR insulating transformer,       |
 -- both available from the company ALSTOM.                                                        |
 --                                                                                                |