FeaturePriorities
Note:* priorities are scaled from 1 (somewhere in the future) to 5 (must have immediately) and are rather subjective.
General stuff:
# Cross platform support. Must work under Linux, Mac OS X and Windows (alphabetical order, no bias here) ****
# Procedure to accurately transfer schematics and PCB layout to and from other ECAD tools:
- Import from Eagle & Altium - the two most popular commercial tools in OH community ****
- Import/export from/to other FOSS tools ****. Extra points for true
reversability ****
- Export to commercial tools ****
# IPC-356 netlist export, which is used by board fab houses to drive their flying probe electrical test equipment ****. .
# Integrated push-and-shove router:
- Push and walkaround mode (router doesn't try to find alternative
paths for conflicting traces): ****
- Full push and shove ****
# Support for negative (a.k.a. split) planes. Such planes are defined by cutting a contiguous copper surface and assigning the resulting slices to appropriate nets. ****
# Command line scripting shell. At the beginning it shall at least
allow for filtering PCB objects - for example, typing
obj.type==Track && obj.layer==Front && obj.net=="MyNet"
would select
all tracks belonging to net "MyNet" on the front layer. ****
# Group property editor (a grid view similar to Altium's Inspector) capable of editing different kinds of objects simultaneously (e.g. changing the net of a selection of tracks/pads/vias) ****
# Assigning footprints directly on the schematic. Library browser in a docker window with footprint/symbol viewer. ****
# Scriptable constraint editor. There are constraint categories, like Length, Width, Clearance where the user can specify the acceptable values and also the conditions (using the scripting language) under which the constraint is checked. ****
# Common shell for schematic editor and PCB layout applications.
- One advantage of the common shell is allowing a component selected in the schematics to be highlighted in the layout, and viceversa. ****
- Schematics/PCBs in tabs ****
- Seamless netlist updates between the schematic & PCB editor via an
integrated IPC mechanism: ****
- Pin-swapping and back-annotating pinswap data from the PCB to the
schematic (without any messing with netlists). ****
# Integrated functional simulation (interface to ngspice/Qucs). A simulation run should be as simple as with ltspice ****
# "Slightly integrated" EM simulation (for power/gnd integrity, crosstalk) ****
# A library model that contains all the complex relations between symbols, footprints, purchase information, simulation models and comments ****
# Export/import to a 3D mechanical CAD application ****
# Web-based model for parts libraries using revision control to leverage crowd sourcing. Full support ****, support for direct links to git/http/svn repos: ****
# Designs in human-readable **** text format so text diffs can be used to efficiently track changes using version control systems ****
- Extra points for a format which has no significant parsing overhead (s-expressions look nice) ****
- Extra points for preserving file content order so the diffs are
minimal and easier to interpret ****.
- Extra points for visual diff-ing involving reasonable development
effort. ****
- Pin swapping constraints, i.e. a possibility to attach a script to a particular component which governs which pins can be swapped and how. For example in Xilinx FPGAs, such script would detect the supply nets for each bank and automatically add the corresponding I/O pins to an appropriate swap group. It could also identify half-banks (a nightmare when using IOSERDES blocks in Spartan/Virtex6, etc...) or GTP clock regions. ****
- Automatic pin assignment file generation for ISE/Quartus/Lattice from the schematic ****