target = "xilinx"
action = "synthesis"

syn_device = "xc6slx45t"
syn_grade = "-3"
syn_package = "fgg484"
syn_top = "spec_pts_si570"
syn_project = "spec_pts_si570.xise"

files = ["../spec_pts_si570.ucf"]

modules = { "local" : "../rtl" }
