Commit 73240a95 authored by Matthieu Cattin's avatar Matthieu Cattin

tmp: Working on fmc_adc module.

Adding exception handling, updating interfaces to common modules.
parent cd5c1e14
This diff is collapsed.
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
# Author: Matthieu Cattin <matthieu.cattin@cern.ch> # Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later. # Licence: GPL v2 or later.
# Website: http://www.ohwr.org # Website: http://www.ohwr.org
# Last modifications: 7/5/2012 # Last modifications: 10/5/2012
# Import system modules # Import system modules
import sys import sys
...@@ -38,8 +38,8 @@ def main (default_directory='.'): ...@@ -38,8 +38,8 @@ def main (default_directory='.'):
start_test_time = time.time() start_test_time = time.time()
print "================================================================================" print "\n================================================================================"
print "Test00 start\n" print "==> Test00 start\n"
# SPEC object declaration # SPEC object declaration
print "Loading hardware access library and opening device.\n" print "Loading hardware access library and opening device.\n"
...@@ -70,7 +70,7 @@ def main (default_directory='.'): ...@@ -70,7 +70,7 @@ def main (default_directory='.'):
# Print carrier CSR registers # Print carrier CSR registers
carrier.print_csr() carrier.print_csr()
print "End of test00\n" print "==> End of test00"
print "================================================================================" print "================================================================================"
end_test_time = time.time() end_test_time = time.time()
print "Test00 elapsed time: %.2f seconds\n" % (end_test_time-start_test_time) print "Test00 elapsed time: %.2f seconds\n" % (end_test_time-start_test_time)
......
...@@ -5,16 +5,25 @@ ...@@ -5,16 +5,25 @@
# Author: Matthieu Cattin <matthieu.cattin@cern.ch> # Author: Matthieu Cattin <matthieu.cattin@cern.ch>
# Licence: GPL v2 or later. # Licence: GPL v2 or later.
# Website: http://www.ohwr.org # Website: http://www.ohwr.org
# Last modifications: 11/5/2012
# Import system modules
import sys import sys
import rr
import time import time
import os import os
# Add common modules location tp path
sys.path.append('../../../')
sys.path.append('../../../gnurabbit/python/')
sys.path.append('../../../common/')
# Import common modules
from ptsexcept import * from ptsexcept import *
import rr
import csr # Import specific modules
import fmc_adc from fmc_adc_spec import *
from fmc_adc import *
""" """
...@@ -23,46 +32,34 @@ test01: Test 1-wire thermometer and read the unique ID. ...@@ -23,46 +32,34 @@ test01: Test 1-wire thermometer and read the unique ID.
Note: Requires test00.py to run first to load the firmware! Note: Requires test00.py to run first to load the firmware!
""" """
CARRIER_CSR = 0x30000 def main (default_directory='.'):
CSR_TYPE_VER = 0x00
CSR_BSTM_TYPE = 0x04
CSR_BSTM_DATE = 0x08
CSR_STATUS = 0x0C
CSR_CTRL = 0x10
PCB_VER_MASK = 0x000F # Constants declaration
CARRIER_TYPE_MASK = 0xFFFF0000 EXPECTED_BITSTREAM_TYPE = 0x1
STATUS_FMC_PRES = (1<<0)
STATUS_P2L_PLL_LCK = (1<<1)
STATUS_SYS_PLL_LCK = (1<<2)
STATUS_DDR3_CAL_DONE = (1<<3)
CTRL_LED_GREEN = (1<<0) start_test_time = time.time()
CTRL_LED_RED = (1<<1) print "================================================================================"
CTRL_DAC_CLR_N = (1<<2) print "Test01 start\n"
FAMILY_CODE = 0x28 # SPEC object declaration
print "Loading hardware access library and opening device.\n"
spec = rr.Gennum()
def main (default_directory='.'): # Carrier object declaration (SPEC board specific part)
try:
carrier = CFmcAdc100mSpec(spec, EXPECTED_BITSTREAM_TYPE)
except FmcAdc100mSpecOperationError as e:
raise PtsCritical("Carrier init failed, test stopped: %s" % e)
""" # Mezzanine object declaration (FmcAdc100m14b4cha board specific part)
path_fpga_loader = '../../../gnurabbit/user/fpga_loader'; try:
path_firmware = '../firmwares/spec_fmcadc100m14b4cha.bin'; fmc = CFmcAdc100m(spec)
except FmcAdc100mOperationError as e:
raise PtsCritical("Mezzanine init failed, test stopped: %s" % e)
firmware_loader = os.path.join(default_directory, path_fpga_loader)
bitstream = os.path.join(default_directory, path_firmware)
print firmware_loader + ' ' + bitstream
os.system( firmware_loader + ' ' + bitstream )
time.sleep(2);
"""
# Objects declaration
spec = rr.Gennum() # bind to the SPEC board
carrier_csr = csr.CCSR(spec, CARRIER_CSR)
fmc = fmc_adc.CFmcAdc100Ms(spec)
# Read unique ID and print to log # Read unique ID and print to log
unique_id = fmc.get_unique_id() unique_id = fmc.get_unique_id()
......
...@@ -137,7 +137,7 @@ def main (default_directory='.'): ...@@ -137,7 +137,7 @@ def main (default_directory='.'):
#--------------------------------------------------------------------------- #---------------------------------------------------------------------------
print('Set positive offset: %.4X' % OFFSET_POS) print('Set positive offset: %.4X' % OFFSET_POS)
for i in range(1, NB_CHANNELS+1): for i in range(1, NB_CHANNELS+1):
fmc.dc_offset_calibr(i, OFFSET_POS) fmc.set_dc_offset(i, OFFSET_POS)
time.sleep(DAC_SET_SLEEP) time.sleep(DAC_SET_SLEEP)
# Read channels # Read channels
...@@ -172,7 +172,7 @@ def main (default_directory='.'): ...@@ -172,7 +172,7 @@ def main (default_directory='.'):
#--------------------------------------------------------------------------- #---------------------------------------------------------------------------
print('Set negative offset: %.4X' % OFFSET_NEG) print('Set negative offset: %.4X' % OFFSET_NEG)
for i in range(1, NB_CHANNELS+1): for i in range(1, NB_CHANNELS+1):
fmc.dc_offset_calibr(i, OFFSET_NEG) fmc.set_dc_offset(i, OFFSET_NEG)
time.sleep(DAC_SET_SLEEP) time.sleep(DAC_SET_SLEEP)
# Read channels # Read channels
......
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