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Commit a779408d authored by Matthieu Cattin's avatar Matthieu Cattin
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fmc_adc: Move timetag core to fmc_adc class.

parent ea23d039
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test/fmcadc100m14b4cha/python/fmc_adc.py
View file @ a779408d
......@@ -28,13 +28,13 @@ from max5442 import *
from si57x import *
# Import register maps
from utc_core_regs import *
from fmcadc100m_csr import *
# Converts digital value to volts
def digital2volt(value, full_scale, nb_bit):
return float(value) * float(full_scale)/2**nb_bit - full_scale/2.0
......@@ -75,6 +75,8 @@ class FmcAdc100mOperationError(Exception):
class CFmcAdc100m:
UTC_CORE_ADDR = 0x0
FMC_SYS_I2C_ADDR = 0x1000
EEPROM_ADDR = 0x50
......@@ -85,139 +87,56 @@ class CFmcAdc100m:
FMC_I2C_ADDR = 0x1200
SI570_ADDR = 0x55
FMC_ONEWIRE_ADDR = 0x1400
FMC_CSR_ADDR = 0x1300
FMC_ONEWIRE_ADDR = 0x1400
"""
FMC_CSR = {0x00:'Control register',
0x04:'Status register',
0x08:'Trigger configuration register',
0x0C:'Trigger delay register',
0x10:'Software trigger register',
0x14:'Number of shots register',
0x18:'Trigger position register',
0x1C:'Decimation factor register',
0x20:'Pre-trigger samples register',
0x24:'Post-trigger samples register',
0x28:'Samples counter register',
0x2C:'CH1 control register',
0x30:'CH1 current value register',
0x34:'CH1 gain calibration register',
0x38:'CH1 offset calibration register',
0x3C:'CH2 control register',
0x40:'CH2 current value register',
0x44:'CH2 gain calibration register',
0x48:'CH2 offset calibration register',
0x4C:'CH3 control register',
0x50:'CH3 current value register',
0x54:'CH3 gain calibration register',
0x58:'CH3 offset calibration register',
0x5C:'CH4 control register',
0x60:'CH4 current value register',
0x64:'CH4 gain calibration register',
0x68:'CH4 offset calibration register',}
R_CTL = 0x00
R_STA = 0x04
R_TRIG_CFG = 0x08
R_TRIG_DLY = 0x0C
R_SW_TRIG = 0x10
R_SHOTS = 0x14
R_TRIG_POS = 0x18
R_SRATE = 0x1C
R_PRE_SAMPLES = 0x20
R_POST_SAMPLES = 0x24
R_SAMP_CNT = 0x28
R_CH1_SSR = 0x2C
R_CH1_VALUE = 0x30
R_CH1_GAIN = 0x34
R_CH1_OFFSET = 0x38
R_CH2_SSR = 0x3C
R_CH2_VALUE = 0x40
R_CH2_GAIN = 0x44
R_CH2_OFFSET = 0x48
R_CH3_SSR = 0x4C
R_CH3_VALUE = 0x50
R_CH3_GAIN = 0x54
R_CH3_OFFSET = 0x58
R_CH4_SSR = 0x5C
R_CH4_VALUE = 0x60
R_CH4_GAIN = 0x64
R_CH4_OFFSET = 0x68
CTL_FSM_CMD = 0
CTL_CLK_EN = 2
CTL_OFFSET_DAC_CLR_N = 3
CTL_BSLIP = 4
CTL_TEST_DATA_EN = 5
CTL_TRIG_LED = 6
CTL_ACQ_LED = 7
CTL_MASK = 0xEC
FSM_CMD_MASK = 0x00000003
STA_FSM = 0
STA_SERDES_SYNCED = 4
FSM_MASK = 0x00000007
"""
# UTC core
# tag = [wb_addr_offset, meta, second, coarse, fine]
tag_trig = [0x8, 0, 0, 0, 0]
tag_start = [0x18, 0, 0, 0, 0]
tag_stop = [0x28, 0, 0, 0, 0]
tag_end = [0x38, 0, 0, 0, 0]
# ADC core CSR
FSM_CMD_START = 0x1
FSM_CMD_STOP = 0x2
FSM_STATES = ['N/A','IDLE','PRE_TRIG','WAIT_TRIG',
'POST_TRIG','DECR_SHOT','N/A','others']
"""
TRIG_CFG_HW_SEL = 0
TRIG_CFG_EXT_POL = 1
TRIG_CFG_HW_EN = 2
TRIG_CFG_SW_EN = 3
TRIG_CFG_INT_SEL = 4
TRIG_CFG_INT_THRES = 16
INT_SEL_MASK = 0xFFFFFFCF
INT_THRES_MASK = 0x0000FFFF
"""
IN_TERM = (1<<3)
IN_TERM_MASK = 0x08
IN_RANGES = {'100mV': 0x23, '1V': 0x11, '10V': 0x45, 'CAL': 0x40, 'OPEN': 0x00, 'CAL_100mV': 0x42, 'CAL_1V': 0x40, 'CAL_10V': 0x44}
# DAC correction data local storage
dac_corr_data = {'10V':{'offset':[0x0,0x0,0x0,0x0],'gain':[0x8000,0x8000,0x8000,0x8000]},
'1V':{'offset':[0x0,0x0,0x0,0x0],'gain':[0x8000,0x8000,0x8000,0x8000]},
'100mV':{'offset':[0x0,0x0,0x0,0x0],'gain':[0x8000,0x8000,0x8000,0x8000]}}
# Timeout to avoid infinte loops
WAIT_TIME_OUT = 2
"""
def channel_addr(self, channel, reg):
if(channel < 1 or channel > 4):
raise FmcAdc100mOperationError("Channel number not in range (1 to 4).")
else:
addr = (reg + (0x10*(channel - 1)))
#print("Channel %d address: %.2X") % (channel, addr)
return addr
"""
def __init__(self, bus, offset=0x4000):
def __init__(self, bus, offset=0x2000):
self.bus = bus
self.offset = offset
self.adc_mezz_offset = offset
self.adc_core_offset = offset + 0x2000
try:
# Objects declaration
self.fmc_sys_i2c = COpenCoresI2C(self.bus, self.offset + self.FMC_SYS_I2C_ADDR, 249)
self.fmc_i2c = COpenCoresI2C(self.bus, self.offset + self.FMC_I2C_ADDR, 249)
self.utc_core = CCSR(self.bus, self.adc_mezz_offset + self.UTC_CORE_ADDR, UTC_CORE_REGS)
self.fmc_sys_i2c = COpenCoresI2C(self.bus, self.adc_core_offset + self.FMC_SYS_I2C_ADDR, 249)
self.fmc_i2c = COpenCoresI2C(self.bus, self.adc_core_offset + self.FMC_I2C_ADDR, 249)
self.eeprom_24aa64 = C24AA64(self.fmc_sys_i2c, self.offset + self.EEPROM_ADDR)
self.si570 = CSi57x(self.fmc_i2c, self.offset + self.SI570_ADDR)
self.eeprom_24aa64 = C24AA64(self.fmc_sys_i2c, self.adc_core_offset + self.EEPROM_ADDR)
self.si570 = CSi57x(self.fmc_i2c, self.adc_core_offset + self.SI570_ADDR)
self.fmc_onewire = COpenCoresOneWire(self.bus, self.offset + self.FMC_ONEWIRE_ADDR, 624, 124)
self.fmc_onewire = COpenCoresOneWire(self.bus, self.adc_core_offset + self.FMC_ONEWIRE_ADDR, 624, 124)
self.ds18b20 = CDS18B20(self.fmc_onewire, 0)
self.fmc_spi = COpenCoresSPI(self.bus, self.offset + self.FMC_SPI_ADDR, self.FMC_SPI_DIV)
self.fmc_spi = COpenCoresSPI(self.bus, self.adc_core_offset + self.FMC_SPI_ADDR, self.FMC_SPI_DIV)
self.adc_cfg = CLTC217x(self.fmc_spi, self.FMC_SPI_SS['ADC'])
self.dac_ch = []
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC1']))
......@@ -225,7 +144,7 @@ class CFmcAdc100m:
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC3']))
self.dac_ch.append(CMAX5442(self.fmc_spi, self.FMC_SPI_SS['DAC4']))
self.fmc_adc_csr = CCSR(self.bus, self.offset + self.FMC_CSR_ADDR, FMCADC100M_CSR)
self.fmc_adc_csr = CCSR(self.bus, self.adc_core_offset + self.FMC_CSR_ADDR, FMCADC100M_CSR)
# Set channels gain to 1
self.fmc_adc_csr.set_field('CH1_GAIN', 'VAL', 0x8000)
......@@ -297,6 +216,130 @@ class CFmcAdc100m:
print("Test pattern status : %.1X") % self.adc_cfg.get_testpat_stat()
#======================================================================
# UTC core
# Print UTC core register map
def print_utc_core_regs(self):
self.utc_core.print_reg_map()
# Set UTC core with current computer time
def set_utc_time(self):
try:
current_time = time.time()
utc_seconds = int(current_time)
self.utc_core.set_reg('SECONDS', utc_seconds)
utc_coarse = int((current_time - utc_seconds)/8E-9)
self.utc_core.set_reg('COARSE', utc_coarse)
return current_time
except CSRDeviceOperationError as e:
raise FmcAdc100mSvecOperationError(e)
# Returns UTC seconds counter value
def get_utc_second_cnt(self):
try:
return self.utc_core.get_reg('SECONDS')
except CSRDeviceOperationError as e:
raise FmcAdc100mSvecOperationError(e)
# Set UTC seconds counter
def set_utc_second_cnt(self, value):
try:
self.utc_core.set_reg('SECONDS', value)
return self.utc_core.get_reg('SECONDS')
except CSRDeviceOperationError as e:
raise FmcAdc100mSvecOperationError(e)
# Returns UTC coarse counter value
def get_utc_coarse_cnt(self):
try:
return self.utc_core.get_reg('COARSE')
except CSRDeviceOperationError as e:
raise FmcAdc100mSvecOperationError(e)
# Set UTC coarse counter
def set_utc_coarse_cnt(self, value):
try:
self.utc_core.set_reg('COARSE', value)
return self.utc_core.get_reg('COARSE')
except CSRDeviceOperationError as e:
raise FmcAdc100mSvecOperationError(e)
###########################################################################
########## Code to review ##########
# Returns last trigger event time-tag
def get_utc_trig_tag(self):
# Get metadata
addr = self.tag_trig[0]
self.tag_trig[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_trig[0]+0x4
self.tag_trig[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_trig[0]+0x8
self.tag_trig[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_trig[0]+0xc
self.tag_trig[4] = self.utc_core.rd_reg(addr)
return self.tag_trig
# Returns last acquisition start event time-tag
def get_utc_start_tag(self):
# Get metadata
addr = self.tag_start[0]
self.tag_start[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_start[0]+0x4
self.tag_start[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_start[0]+0x8
self.tag_start[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_start[0]+0xc
self.tag_start[4] = self.utc_core.rd_reg(addr)
return self.tag_start
# Returns last acquisition stop event time-tag
def get_utc_stop_tag(self):
# Get metadata
addr = self.tag_stop[0]
self.tag_stop[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_stop[0]+0x4
self.tag_stop[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_stop[0]+0x8
self.tag_stop[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_stop[0]+0xc
self.tag_stop[4] = self.utc_core.rd_reg(addr)
return self.tag_stop
# Returns last acquisition end event time-tag
def get_utc_end_tag(self):
# Get metadata
addr = self.tag_end[0]
self.tag_end[1] = self.utc_core.rd_reg(addr)
# Get seconds
addr = self.tag_end[0]+0x4
self.tag_end[2] = self.utc_core.rd_reg(addr)
# Get coarse
addr = self.tag_end[0]+0x8
self.tag_end[3] = self.utc_core.rd_reg(addr)
# Get fine
addr = self.tag_end[0]+0xc
self.tag_end[4] = self.utc_core.rd_reg(addr)
return self.tag_end
###########################################################################
#======================================================================
# Onewire thermometer and unique ID
......
test/fmcadc100m14b4cha/python/fmc_adc_demo.py
View file @ a779408d
......@@ -194,10 +194,10 @@ def poll_timer_cb():
temp = "%3.3f"%fmc.get_temp()
temp += u'\u00B0'+'C'
m.mezz_temp.setText(temp)
trig_tag = carrier.get_utc_trig_tag()
start_tag = carrier.get_utc_start_tag()
stop_tag = carrier.get_utc_stop_tag()
end_tag = carrier.get_utc_end_tag()
trig_tag = fmc.get_utc_trig_tag()
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
trig_tag_s = "%09d.%010d s"%(trig_tag[2],(trig_tag[3]*8))
start_tag_s = "%09d.%010d s"%(start_tag[2],(start_tag[3]*8))
stop_tag_s = "%09d.%010d s"%(stop_tag[2],(stop_tag[3]*8))
......@@ -239,11 +239,11 @@ if __name__ == "__main__":
# Set UTC
current_time = time.time()
utc_seconds = int(current_time)
carrier.set_utc_second_cnt(utc_seconds)
#print('UTC core seconds counter: %d')%carrier.get_utc_second_cnt()
fmc.set_utc_second_cnt(utc_seconds)
#print('UTC core seconds counter: %d')%fmc.get_utc_second_cnt()
utc_coarse = int((current_time - utc_seconds)/8E-9)
carrier.set_utc_coarse_cnt(utc_coarse)
#print('UTC core coarse counter: %d')%carrier.get_utc_coarse_cnt()
fmc.set_utc_coarse_cnt(utc_coarse)
#print('UTC core coarse counter: %d')%fmc.get_utc_coarse_cnt()
# Variables from GUI
ch_range = [m.ch1_range, m.ch2_range, m.ch3_range, m.ch4_range]
......
test/fmcadc100m14b4cha/python/test12.py
View file @ a779408d
......@@ -196,12 +196,12 @@ def main (default_directory='.'):
# Set UTC
current_time = time.time()
utc_seconds = int(current_time)
carrier.set_utc_second_cnt(utc_seconds)
print "UTC core seconds counter initialised to : %d" % carrier.get_utc_second_cnt()
fmc.set_utc_second_cnt(utc_seconds)
print "UTC core seconds counter initialised to : %d" % fmc.get_utc_second_cnt()
utc_coarse = int((current_time - utc_seconds)/8E-9)
carrier.set_utc_coarse_cnt(utc_coarse)
print "UTC core coarse counter initialised to : %d" % carrier.get_utc_coarse_cnt()
fmc.set_utc_coarse_cnt(utc_coarse)
print "UTC core coarse counter initialised to : %d" % fmc.get_utc_coarse_cnt()
# Print configuration
fmc.print_adc_core_config()
......@@ -243,15 +243,17 @@ def main (default_directory='.'):
acq_data = acq_channels(fmc, carrier, ADC_FS[IN_RANGE], ACQ_PAUSE)
channels_data[ch] = acq_data[ch::4]
# Get time-tags
trig_tag = carrier.get_utc_trig_tag()
start_tag = carrier.get_utc_start_tag()
stop_tag = carrier.get_utc_stop_tag()
end_tag = carrier.get_utc_end_tag()
trig_tag = fmc.get_utc_trig_tag()
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
print('Acq stop time-tag : %10.10f [s]')%(stop_tag[2]+(stop_tag[3]*8E-9))
print('Acq start time-tag : %10.10f [s]')%(start_tag[2]+(start_tag[3]*8E-9))
print('Trigger time-tag : %10.10f [s]')%(trig_tag[2]+(trig_tag[3]*8E-9))
print('Acq end time-tag : %10.10f [s]')%(end_tag[2]+(end_tag[3]*8E-9))
fmc.print_utc_core_regs()
# Calculate mean for each channel data
ch_mean = []
for ch in range(NB_CHANNELS):
......
test/fmcadc100m14b4cha/python/test14.py
View file @ a779408d
......@@ -169,12 +169,12 @@ def main (default_directory='.'):
# Set UTC
current_time = time.time()
utc_seconds = int(current_time)
spec_fmc.set_utc_second_cnt(utc_seconds)
print('UTC core seconds counter: %d')%spec_fmc.get_utc_second_cnt()
fmc.set_utc_second_cnt(utc_seconds)
print('UTC core seconds counter: %d')%fmc.get_utc_second_cnt()
utc_coarse = int((current_time - utc_seconds)/8E-9)
spec_fmc.set_utc_coarse_cnt(utc_coarse)
print('UTC core coarse counter: %d')%spec_fmc.get_utc_coarse_cnt()
fmc.set_utc_coarse_cnt(utc_coarse)
print('UTC core coarse counter: %d')%fmc.get_utc_coarse_cnt()
# Set sine params
sine.frequency = 1E6
......@@ -213,10 +213,10 @@ def main (default_directory='.'):
# Print time-tags
print('UTC time-tags:')
trig_tag = spec_fmc.get_utc_trig_tag()
start_tag = spec_fmc.get_utc_start_tag()
stop_tag = spec_fmc.get_utc_stop_tag()
end_tag = spec_fmc.get_utc_end_tag()
trig_tag = fmc.get_utc_trig_tag()
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
print trig_tag
print start_tag
print stop_tag
......
test/fmcadc100m14b4cha/python/test15.py
View file @ a779408d
......@@ -224,11 +224,11 @@ def main (default_directory='.'):
# Set UTC
current_time = time.time()
utc_seconds = int(current_time)
spec_fmc.set_utc_second_cnt(utc_seconds)
print "\nUTC core seconds counter: %d"%spec_fmc.get_utc_second_cnt()
fmc.set_utc_second_cnt(utc_seconds)
print "\nUTC core seconds counter: %d"%fmc.get_utc_second_cnt()
utc_coarse = int((current_time - utc_seconds)/8E-9)
spec_fmc.set_utc_coarse_cnt(utc_coarse)
print "UTC core coarse counter: %d"%spec_fmc.get_utc_coarse_cnt()
fmc.set_utc_coarse_cnt(utc_coarse)
print "UTC core coarse counter: %d"%fmc.get_utc_coarse_cnt()
# Connects channel 1 to AWG
ch = 1
......@@ -333,10 +333,10 @@ def main (default_directory='.'):
# Print time-tags
print "\nUTC time-tags:"
trig_tag = spec_fmc.get_utc_trig_tag()
start_tag = spec_fmc.get_utc_start_tag()
stop_tag = spec_fmc.get_utc_stop_tag()
end_tag = spec_fmc.get_utc_end_tag()
trig_tag = fmc.get_utc_trig_tag()
start_tag = fmc.get_utc_start_tag()
stop_tag = fmc.get_utc_stop_tag()
end_tag = fmc.get_utc_end_tag()
print "Trigger time-tag : %10.10f [s]"%(trig_tag[2]+(trig_tag[3]*8E-9))
print "Acq start time-tag : %10.10f [s]"%(start_tag[2]+(start_tag[3]*8E-9))
print "Acq stop time-tag : %10.10f [s]"%(stop_tag[2]+(stop_tag[3]*8E-9))
......
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