Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
P
Production Test Suite
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
9
Issues
9
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Production Test Suite
Commits
ce417f0a
Commit
ce417f0a
authored
Oct 05, 2012
by
Matthieu Cattin
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Modify si570 get raw config function.
- Returns all registers. - Two dimensions table [address, data]
parent
82d17a29
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
20 additions
and
6 deletions
+20
-6
si57x.py
common/si57x.py
+20
-6
No files found.
common/si57x.py
View file @
ce417f0a
...
...
@@ -33,6 +33,12 @@ class CSi57x:
R_RFREQ2
=
0x0A
R_RFREQ1
=
0x0B
R_RFREQ0
=
0x0C
R_HS_7PPM
=
0x0D
R_RFREQ4_7PPM
=
0x0E
R_RFREQ3_7PPM
=
0x0F
R_RFREQ2_7PPM
=
0x10
R_RFREQ1_7PPM
=
0x11
R_RFREQ0_7PPM
=
0x12
R_RFMC
=
0x87
R_FDCO
=
0x89
...
...
@@ -132,12 +138,20 @@ class CSi57x:
def
get_raw_config
(
self
):
config
=
[]
config
.
append
(
self
.
rd_reg
(
self
.
R_HS
))
config
.
append
(
self
.
rd_reg
(
self
.
R_RFREQ4
))
config
.
append
(
self
.
rd_reg
(
self
.
R_RFREQ3
))
config
.
append
(
self
.
rd_reg
(
self
.
R_RFREQ2
))
config
.
append
(
self
.
rd_reg
(
self
.
R_RFREQ1
))
config
.
append
(
self
.
rd_reg
(
self
.
R_RFREQ0
))
config
.
append
([
self
.
R_HS
,
self
.
rd_reg
(
self
.
R_HS
)])
config
.
append
([
self
.
R_RFREQ4
,
self
.
rd_reg
(
self
.
R_RFREQ4
)])
config
.
append
([
self
.
R_RFREQ3
,
self
.
rd_reg
(
self
.
R_RFREQ3
)])
config
.
append
([
self
.
R_RFREQ2
,
self
.
rd_reg
(
self
.
R_RFREQ2
)])
config
.
append
([
self
.
R_RFREQ1
,
self
.
rd_reg
(
self
.
R_RFREQ1
)])
config
.
append
([
self
.
R_RFREQ0
,
self
.
rd_reg
(
self
.
R_RFREQ0
)])
config
.
append
([
self
.
R_HS_7PPM
,
self
.
rd_reg
(
self
.
R_HS_7PPM
)])
config
.
append
([
self
.
R_RFREQ4_7PPM
,
self
.
rd_reg
(
self
.
R_RFREQ4_7PPM
)])
config
.
append
([
self
.
R_RFREQ3_7PPM
,
self
.
rd_reg
(
self
.
R_RFREQ3_7PPM
)])
config
.
append
([
self
.
R_RFREQ2_7PPM
,
self
.
rd_reg
(
self
.
R_RFREQ2_7PPM
)])
config
.
append
([
self
.
R_RFREQ1_7PPM
,
self
.
rd_reg
(
self
.
R_RFREQ1_7PPM
)])
config
.
append
([
self
.
R_RFREQ0_7PPM
,
self
.
rd_reg
(
self
.
R_RFREQ0_7PPM
)])
config
.
append
([
self
.
R_RFMC
,
self
.
rd_reg
(
self
.
R_RFMC
)])
config
.
append
([
self
.
R_FDCO
,
self
.
rd_reg
(
self
.
R_FDCO
)])
return
config
# For Si571 only !
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment