Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
R
RF Multiplexer 8ch 1GHz
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
3
Issues
3
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
RF Multiplexer 8ch 1GHz
Commits
427b27c3
Commit
427b27c3
authored
Nov 28, 2019
by
Anders Wallin
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
add comments
parent
d14bf741
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
13 additions
and
6 deletions
+13
-6
mcp23s17.h
mux-sw_MKR_ZERO/mcp23s17.h
+9
-2
mux-sw_MKR_ZERO.ino
mux-sw_MKR_ZERO/mux-sw_MKR_ZERO.ino
+4
-4
No files found.
mux-sw_MKR_ZERO/mcp23s17.h
View file @
427b27c3
...
...
@@ -2,7 +2,8 @@
#define __MCP23S17_H__
// MCP23S17 16-Bit I/O Expander with Serial Interface
// http://ww1.microchip.com/downloads/en/devicedoc/20001952c.pdf
namespace
MCP23S17
{
#define SERIAL_DEBUG 0
...
...
@@ -36,6 +37,7 @@ const int OLATB = 0x1A;
*/
// IOCON.Bank = 0
const
int
IODIRA
=
0x00
;
const
int
IPOLA
=
0x02
;
const
int
GPINTENA
=
0x04
;
...
...
@@ -60,6 +62,7 @@ const int INTCAPB = 0x11;
const
int
GPIOB
=
0x13
;
const
int
OLATB
=
0x15
;
const
uint8_t
PINMODE_INPUT
=
0xFF
;
const
uint8_t
PINMODE_OUTPUT
=
0x00
;
...
...
@@ -99,6 +102,10 @@ class MCP23S17 {
public
:
MCP23S17
(
int8_t
SDIO
,
int8_t
CSB
,
int8_t
SCLK
)
{
spi
=
new
SPIBitBang
(
SDIO
,
CSB
,
SCLK
);
// IOCON bits are
// BANK MIRROR SEQOP DISSLW HAEN ODR INTPOL -
write_register
(
IOCON
,
0
b00000000
);
//write_register(IOCON, 0b01110010);
//write_register(0x05 , 0b01110010); // if we were in bank=1 mode
}
...
...
@@ -138,4 +145,4 @@ public:
SPIBitBang
*
spi
;
};
// end class
}
// end namespace
#endif
#endif
mux-sw_MKR_ZERO/mux-sw_MKR_ZERO.ino
View file @
427b27c3
...
...
@@ -28,10 +28,10 @@
// SO A2
// pin-definitions, for the MKR ZERO on the carrier board (2018.11 version)
#define SDIO_PIN A1 // old:3
#define SCLK_PIN A0 // old:4
#define CSB_MUX_A A3 // old 0
#define CSB_MUX_B A4 // old 1
#define SDIO_PIN A1 //
SPI data,
old:3
#define SCLK_PIN A0 //
SPI clock,
old:4
#define CSB_MUX_A A3 //
Chip-select, MUX A,
old 0
#define CSB_MUX_B A4 //
Chip-select, MUX B,
old 1
#define LED1_PIN 0
#define LED2_PIN 1
#define BUT1_PIN 14
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment