wb_slave_fmc_dio_5ch_ttl

FMC DIO 5ch TTL Port

A Wishbone interface for the FMC DIO 5ch TTL

Contents:

1. Memory map summary
2. HDL symbol
3. Register description
3.1. Pin direction register
3.2. Pin state register
3.3. Pin output register
3.4. Pin termination register
3.5. Set output pin register
3.6. Clear output pin register
3.7. LED signaling interface

1. Memory map summary

H/W Address Type Name VHDL/Verilog prefix C prefix
0x0 REG Pin direction register fmc_dio_ddr DDR
0x1 REG Pin state register fmc_dio_psr PSR
0x2 REG Pin output register fmc_dio_pdr PDR
0x3 REG Pin termination register fmc_dio_term TERM
0x4 REG Set output pin register fmc_dio_sopr SOPR
0x5 REG Clear output pin register fmc_dio_copr COPR
0x8 REG LED signaling interface fmc_dio_leds LEDS

2. HDL symbol

rst_n_i Pin direction register:
clk_sys_i fmc_dio_ddr_o[4:0]
wb_adr_i[3:0]  
wb_dat_i[31:0] Pin state register:
wb_dat_o[31:0] fmc_dio_psr_i[4:0]
wb_cyc_i  
wb_sel_i[3:0] Pin output register:
wb_stb_i fmc_dio_pdr_o[4:0]
wb_we_i fmc_dio_pdr_wr_o
wb_ack_o  
wb_stall_o Pin termination register:
fmc_dio_term_o[4:0]
 
Set output pin register:
fmc_dio_sopr_o[4:0]
fmc_dio_sopr_wr_o
 
Clear output pin register:
fmc_dio_copr_o[4:0]
fmc_dio_copr_wr_o
 
LED signaling interface:
fmc_dio_leds_bot_o
fmc_dio_leds_top_o

3. Register description

3.1. Pin direction register

HW prefix: fmc_dio_ddr
HW address: 0x0
C prefix: DDR
C offset: 0x0

A register defining the direction of the DIO pins.

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - DDR[4:0]

3.2. Pin state register

HW prefix: fmc_dio_psr
HW address: 0x1
C prefix: PSR
C offset: 0x4

A register containing the current state of the DIO pins.

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - PSR[4:0]

3.3. Pin output register

HW prefix: fmc_dio_pdr
HW address: 0x2
C prefix: PDR
C offset: 0x8

A register that allows changing the value of the DIO pins by means of a direct write access

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - PDR[4:0]

3.4. Pin termination register

HW prefix: fmc_dio_term
HW address: 0x3
C prefix: TERM
C offset: 0xc

A register defining the use of the 50 Ohm termination

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - TERM[4:0]

3.5. Set output pin register

HW prefix: fmc_dio_sopr
HW address: 0x4
C prefix: SOPR
C offset: 0x10

Writing '1' sets the corresponding DIO pin to '1'

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - SOPR[4:0]

3.6. Clear output pin register

HW prefix: fmc_dio_copr
HW address: 0x5
C prefix: COPR
C offset: 0x14

Writing '1' clears the corresponding DIO pin

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - COPR[4:0]

3.7. LED signaling interface

HW prefix: fmc_dio_leds
HW address: 0x8
C prefix: LEDS
C offset: 0x20

Writing '1' activates the corresponding LED

31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - - - - TOP BOT