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Getting Started with the SPEC
Commits
dfe497c6
Commit
dfe497c6
authored
Jul 04, 2015
by
Javier D. Garcia-Lasheras
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remove superfluous common_pkg from Yarr demo
parent
fb16e1a0
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2 changed files
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1 addition
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67 deletions
+1
-67
Manifest.py
hdl/modules/common/Manifest.py
+1
-3
common_pkg.vhd
hdl/modules/common/common_pkg.vhd
+0
-64
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hdl/modules/common/Manifest.py
View file @
dfe497c6
files
=
[
"wb_addr_decoder.vhd"
,
"rr_arbiter.vhd"
,
"common_pkg.vhd"
]
"rr_arbiter.vhd"
]
hdl/modules/common/common_pkg.vhd
deleted
100644 → 0
View file @
fb16e1a0
library
IEEE
;
use
IEEE
.
STD_LOGIC_1164
.
all
;
use
IEEE
.
NUMERIC_STD
.
all
;
use
work
.
gn4124_core_pkg
.
all
;
package
common_pkg
is
component
generic_async_fifo
is
generic
(
g_data_width
:
natural
;
g_size
:
natural
;
g_show_ahead
:
boolean
:
=
false
;
-- Read-side flag selection
g_with_rd_empty
:
boolean
:
=
true
;
-- with empty flag
g_with_rd_full
:
boolean
:
=
false
;
-- with full flag
g_with_rd_almost_empty
:
boolean
:
=
false
;
g_with_rd_almost_full
:
boolean
:
=
false
;
g_with_rd_count
:
boolean
:
=
false
;
-- with words counter
g_with_wr_empty
:
boolean
:
=
false
;
g_with_wr_full
:
boolean
:
=
true
;
g_with_wr_almost_empty
:
boolean
:
=
false
;
g_with_wr_almost_full
:
boolean
:
=
false
;
g_with_wr_count
:
boolean
:
=
false
;
g_almost_empty_threshold
:
integer
;
-- threshold for almost empty flag
g_almost_full_threshold
:
integer
-- threshold for almost full flag
);
port
(
rst_n_i
:
in
std_logic
:
=
'1'
;
-- write port
clk_wr_i
:
in
std_logic
;
d_i
:
in
std_logic_vector
(
g_data_width
-1
downto
0
);
we_i
:
in
std_logic
;
wr_empty_o
:
out
std_logic
;
wr_full_o
:
out
std_logic
;
wr_almost_empty_o
:
out
std_logic
;
wr_almost_full_o
:
out
std_logic
;
wr_count_o
:
out
std_logic_vector
(
log2_ceil
(
g_size
)
-1
downto
0
);
-- read port
clk_rd_i
:
in
std_logic
;
q_o
:
out
std_logic_vector
(
g_data_width
-1
downto
0
);
rd_i
:
in
std_logic
;
rd_empty_o
:
out
std_logic
;
rd_full_o
:
out
std_logic
;
rd_almost_empty_o
:
out
std_logic
;
rd_almost_full_o
:
out
std_logic
;
rd_count_o
:
out
std_logic_vector
(
log2_ceil
(
g_size
)
-1
downto
0
)
);
end
component
generic_async_fifo
;
end
common_pkg
;
package
body
common_pkg
is
end
common_pkg
;
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