Commit cf45b6e9 authored by Maciej Lipinski's avatar Maciej Lipinski

update to incluede the fact that now we have "override" bit to use

the WB-provided configuration (otherwise, the values provided by
generics are used)
parent 63136820
/* /*
Register definitions for slave core: WR Btrain transmission control Register definitions for slave core: WR Btrain transmission control
* File : WRBtrain.h * File : ../../../sw/includes/WRBtrain.h
* Author : auto-generated by wbgen2 from WRBtrain_wb.wb * Author : auto-generated by wbgen2 from WRBtrain_wb.wb
* Created : Tue Nov 29 00:33:02 2016 * Created : Fri Dec 2 15:20:11 2016
* Standard : ANSI C * Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE WRBtrain_wb.wb THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE WRBtrain_wb.wb
...@@ -49,6 +49,12 @@ ...@@ -49,6 +49,12 @@
/* definitions for field: Invert RX valid polarity in reg: Status and ctontrol register */ /* definitions for field: Invert RX valid polarity in reg: Status and ctontrol register */
#define WRBTRAIN_SCR_RX_VALID_POL_INV WBGEN2_GEN_MASK(8, 1) #define WRBTRAIN_SCR_RX_VALID_POL_INV WBGEN2_GEN_MASK(8, 1)
/* definitions for field: TX override default config in reg: Status and ctontrol register */
#define WRBTRAIN_SCR_TX_OR_CONFIG WBGEN2_GEN_MASK(9, 1)
/* definitions for field: RX override default config in reg: Status and ctontrol register */
#define WRBTRAIN_SCR_RX_OR_CONFIG WBGEN2_GEN_MASK(10, 1)
/* definitions for field: Dummy in reg: Status and ctontrol register */ /* definitions for field: Dummy in reg: Status and ctontrol register */
#define WRBTRAIN_SCR_DUMMY_MASK WBGEN2_GEN_MASK(16, 16) #define WRBTRAIN_SCR_DUMMY_MASK WBGEN2_GEN_MASK(16, 16)
#define WRBTRAIN_SCR_DUMMY_SHIFT 16 #define WRBTRAIN_SCR_DUMMY_SHIFT 16
......
...@@ -124,7 +124,7 @@ static char description[][100] = { ...@@ -124,7 +124,7 @@ static char description[][100] = {
{" - set valid period in [us] (0x0000:output disabled)"}, /* 26*/ {" - set valid period in [us] (0x0000:output disabled)"}, /* 26*/
{" - set valid delay in [us] "}}; /* 27*/ {" - set valid delay in [us] "}}; /* 27*/
static int wr_trans_base=0x1100; static int wr_trans_base=0xE0700; //old (before wrpc-v3.1): 0x1100;
static int btrain_base =0x1200; static int btrain_base =0x1200;
static void *card=0; static void *card=0;
static int bus = 1, dev_fn = 0; static int bus = 1, dev_fn = 0;
...@@ -383,16 +383,30 @@ void set_bt_tx_period(int argument) ...@@ -383,16 +383,30 @@ void set_bt_tx_period(int argument)
uint32_t val=0; uint32_t val=0;
val = (argument*1000)/16; val = (argument*1000)/16;
write_btrain(WRBTRAIN_TX_PERIOD_VALUE_W(val),WRBTRAIN_REG_TX_PERIOD); write_btrain(WRBTRAIN_TX_PERIOD_VALUE_W(val),WRBTRAIN_REG_TX_PERIOD);
// override default config (using generics)
val = read_transmission(WRBTRAIN_REG_SCR);
val = val | WRBTRAIN_SCR_TX_OR_CONFIG;
write_btrain(val, WRBTRAIN_REG_SCR);
///////////////////////////////////////////
fprintf(stderr, "Send with period %d [us] = %d cycles (0x%x)\n", fprintf(stderr, "Send with period %d [us] = %d cycles (0x%x)\n",
argument, val, val); argument, val, val);
} }
void set_bt_valid_period(int argument) void set_bt_valid_period(int argument)
{ {
uint32_t set_val=0, get_val=0; uint32_t set_val=0, get_val=0, val=0;
set_val = argument; set_val = argument;
write_btrain(WRBTRAIN_RX_OUT_DATA_TIME_VALID_W(set_val),WRBTRAIN_REG_RX_OUT_DATA_TIME); write_btrain(WRBTRAIN_RX_OUT_DATA_TIME_VALID_W(set_val),WRBTRAIN_REG_RX_OUT_DATA_TIME);
get_val = WRBTRAIN_RX_OUT_DATA_TIME_VALID_R(read_btrain(WRBTRAIN_REG_RX_OUT_DATA_TIME)); get_val = WRBTRAIN_RX_OUT_DATA_TIME_VALID_R(read_btrain(WRBTRAIN_REG_RX_OUT_DATA_TIME));
// override default config (using generics)
val = read_transmission(WRBTRAIN_REG_SCR);
val = val | WRBTRAIN_SCR_RX_OR_CONFIG;
write_btrain(val, WRBTRAIN_REG_SCR);
///////////////////////////////////////////
fprintf(stderr, "Send rx valid period period %d [ns] = %d [cycles] (0x%x) | get=%d\n", fprintf(stderr, "Send rx valid period period %d [ns] = %d [cycles] (0x%x) | get=%d\n",
set_val*16, set_val, get_val); set_val*16, set_val, get_val);
} }
......
/* /*
Register definitions for slave core: WR Transmission control, status and debug Register definitions for slave core: WR Transmission control, status and debug
* File : ./doc/wr_transmission.h * File : wr_transmission.h
* Author : auto-generated by wbgen2 from wr_transmission_wb.wb * Author : auto-generated by wbgen2 from wr_transmission_wb.wb
* Created : Wed Nov 30 10:13:56 2016 * Created : Tue Nov 29 00:16:19 2016
* Standard : ANSI C * Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wr_transmission_wb.wb THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wr_transmission_wb.wb
......
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