TiCkS is a flexible White Rabbit based time-stamping board.
Project description
The TiCkS board is an FMC carrier that can hold one FMC card and an SFP connector. The FMC mezzanine slot uses a low-pin count connector. This board is optimised for cost and is usable with most of the FMC cards designed within the OHR project (e.g. ADC cards, Fine Delay). The TiCkS board provides ns time stamping for CTA camera triggers to allow search of coincidences between telescope’s events. It implements a UDP stack to send bunches of timestamps and receive configuration commands. The boards are powered by a 24 Volts DC power supply.
Boards with a very similar architecture are available for the VME bus
(SVEC - Simple VME FMC Carrier
(SVEC)) and for the PXI
Express bus (SPEXI - Simple PXI express FMC Carrier Board
(SPEXI)).
Other FMC projects and the FMC standard are described in FMC
Projects.
Main Features
- 1x Xilinx Spartan6 FPGA (XC6SLX45T-3FGG484C)
- footprint compatible XC6SLX100T and XC6SLX150T
- FMC slot with low pin count (LPC) connector
- Vadj fixed to 2.5V
- FMC connectivity: all 34 differential pairs connected, 1 GTP transceiver with clock, 2 clock pairs, JTAG, I2C
- No dedicated clock signals from Carrier to FMC (only available on HPC pins)
- Clocking resources
- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100 MHz (Silicon Labs Si570, 570BBC000121DG, freely usable)
- 1x 25 MHz TCXO (MCOT7250003V300000RA) controlled by a DAC with SPI interface (AD5662, used by White Rabbit PTP core)
- 1x 20 MHz VCXO (IQD VCXO026156) controlled by a DAC with SPI interface (AD5662, used by White Rabbit PTP core)
- 1x low-jitter frequency synthesizer (TI CDCM61004, fixed configuration, Fout=125 MHz, used by White Rabbit PTP core)
- On board memory
- 1x SPI 32Mbit flash PROM for multiboot FPGA powerup configuration, storage of the FPGA firmware or of critical data (M25P32-VMF6P - EOL)
- Miscellaneous
- on-board thermometer IC (DS18B20U+)
- unique 64-bit identifier (DS18B20U+)
- Front panel containing
- 1x Small Formfactor Pluggable (SFP) cage for fibre-optic transceiver (WhiteRabbit support). 1.25 and 2.5 Gbps.
- Programmable Red and Green LEDs
- FMC front panel
- Internal connectors
- 1x JTAG header for Xilinx programming during debugging
- 1x mini USB AB (USB-UART bridge)
- FPGA configuration. The FPGA can optionally be programmed from:
- JTAG header
- SPI 32Mbit flash PROM
- Stand-alone features
- External 9V to 36V power supply connector
- mini USB connector
- 3 LEDs
- Power consumption: 5-12 Watt, depending on application
- Optimised for cost
- 6-layer PCB
- Optional cooling fan for the mezzanine.
Project information
-
TiCkS: a flexible White-Rabbit based time-stamping
board
C. Champion et al, CTA Consortium, ICALEPCS 2017 - Official production documentation:
- Getting Started with the SPEC (project)
- System architecture
- Users
- Software
- Frequently Asked Questions
Releases
- Hardware
Contacts
General questions about project
- Cédric Champion
- User's manual (https://mdpunch.pages.in2p3.fr/ticks/MainText.html#)
Status
Date | Event |
---|---|
10-11-2014 | Start of project. Design is done by APC Engineers for CTA Project, based on the FMC PCIe Carrier. |
29-06-2010 | Main features reviewed by JS, PA, MC & EB. Design can start. |
12-07-2010 | First schematics published. Ready for review. |
10-09-2010 | Review comments integrated. Start of PCB layout. |
05-10-2010 | PCB layout review held. |
05-11-2010 | Design finished. |
19-01-2011 | Three prototypes arrived at CERN. |
18-04-2011 | First V1.1 prototypes received, start testing them. |
01-07-2011 | Three V2 boards received. One fully tested OK. Two only shortly tested. |
17-07-2011 | Order placed for 70 SPEC cards at Seven Solutions. |
23-08-2011 | V4 released. Solves a minor mechanical problem with the SFP connector. |
14-03-2012 | CERN accepted the 10 preseries boards that were received on 7 March. |
14-11-2019 | TiCkS boards passed most restrictive EMC tests for industrial and domestic classes. Test report. |
13 November 2020