hdl/spec_base_wr: tie sim_wb_i to 0s when not used

5861d188 · Tomasz Wlostowski · Federico Vaga · 8bbdf20f · 5861d188
Commit 5861d188 authored May 19, 2020 by Tomasz Wlostowski Committed by Federico Vaga May 28, 2020
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spec_base_wr.vhd hdl/rtl/spec_base_wr.vhd +1 -1

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--- a/hdl/rtl/spec_base_wr.vhd
+++ b/hdl/rtl/spec_base_wr.vhd
@@ -303,7 +303,7 @@ entity spec_base_wr is
    app_wb_o           : out t_wishbone_master_out;
    app_wb_i           : in  t_wishbone_master_in;

-    sim_wb_i : in t_wishbone_slave_in;
+    sim_wb_i : in t_wishbone_slave_in := cc_dummy_slave_in;
    sim_wb_o : out t_wishbone_slave_out
  );
 end entity spec_base_wr;