V4 - Pull-down resistor on PCIe PERST_N line
The 10k pull-down resistor on PCIe PERST_N (or PERST#) line is too low
for certain type of motherboard.
For example, the PCIE-Q57A-R10 Rev 1.0 from IEI is using a 8k2 pull-up resistor to 3V3 on the PERST_N line (reposted by Antonin Broquet from ESRF).
It creates a divider with the 10k on the SPEC, causing the voltage to drop under Vih_min (2V) and resetting the GN4124.
The "Gullwing" board (GN4124 evaluation board) uses a 100k pull-down on
Perhaps in a future revision, the pull-down should be increased to 100k on the SPEC.
Here is what the "PCI Express
> PERST#, required
> The PERST# signal is used to indicate when the power supply is within its specified voltage tolerance and is stable. It also initializes a component’s state machines and other logic once power supplies stabilize. On power up, the deassertion of PERST# is delayed 100 ms (T_PVPERL) from the power rails achieving specified operating limits.
> Also, within this time, the reference clocks 10 (REFCLK+, REFCLK-) also become stable, at least T_PERST-CLK before PERST# is deasserted.
> PERST# is asserted in advance of the power being switched off in a power-managed state like S3.
> PERST# is asserted when the power supply is powered down, but without the advanced warning of the transition.
> Vil_max = 0.8V
> Vih_min = 2.0V