Merge branch 'release/v1.4.10' into develop

a7fe13a3 · Federico Vaga · b641c238 · 410df44d · a7fe13a3 · a7fe13a3
Commit a7fe13a3 authored May 12, 2020 by Federico Vaga
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CHANGELOG.rst CHANGELOG.rst +7 -2

svec_base_wr.vhd hdl/rtl/svec_base_wr.vhd +1 -1

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--- a/CHANGELOG.rst
+++ b/CHANGELOG.rst
@@ -2,8 +2,13 @@
 Change Log
 ==========

-Unreleased
-==========
+[1.4.10] 2020-05-12
+==================
+Added
+-----
+- [hdl] metadata source-id automatic assignment
+- [hdl] add option to consider AM in VME slave decoder
+
 Fixed
 -----
 - [hdl] fix typos when ddr is not configured. This froze the board when

--- a/hdl/rtl/svec_base_wr.vhd
+++ b/hdl/rtl/svec_base_wr.vhd
@@ -652,7 +652,7 @@ begin  -- architecture top
          metadata_data <= x"53564543";
        when x"2" =>
          -- Version
-          metadata_data <= x"01040000";
+          metadata_data <= x"0104000a";
        when x"3" =>
          -- BOM
          metadata_data <= x"fffe0000";