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Simple VME FMC Carrier SVEC
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Simple VME FMC Carrier SVEC
Issues
Open
14
Closed
47
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61
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V0 - Wrong name for 12V testpoint
#32
· opened
Aug 17, 2012
by
Projects
bug
CLOSED
1
updated
Oct 09, 2023
V1 - various PCB layout issues
#26
· opened
Oct 19, 2012
by
Erik van der Bij
bug
CLOSED
2
updated
Oct 09, 2023
V0 - Add SO16 footprint for FPGA config flash
#31
· opened
Aug 17, 2012
by
Projects
feature
CLOSED
1
updated
Oct 09, 2023
V2 - Front-panel BOM missing EMC Gasket. Change screw.
#20
· opened
Dec 11, 2012
by
Erik van der Bij
bug
CLOSED
6
updated
Oct 09, 2023
V1 - GTP clock inverted
#27
· opened
Oct 16, 2012
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Oct 09, 2023
V1 - Review 12V generation schematics
#30
· opened
Sep 03, 2012
by
Erik van der Bij
feature
CLOSED
2
updated
Oct 09, 2023
HDL: increase space for the AFPGA bitstream in the flash
#17
· opened
Dec 05, 2013
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Dec 05, 2022
DS locs are swapped in golden UCF
#4
· opened
Sep 20, 2017
by
Tristan Gingold
bug
CLOSED
1
updated
Dec 05, 2022
Reset CDCM61004 PLL on powerup
#16
· opened
Feb 07, 2014
by
Tomasz Wlostowski
bug
CLOSED
1
updated
Dec 05, 2022
V2 - Mini DisplayPort connector is obsolete
#15
· opened
Aug 18, 2014
by
Projects
feature
CLOSED
2
updated
Dec 05, 2022
Gateware: missing support for hdlmake
#7
· opened
Sep 13, 2017
by
Dimitris Lampridis
feature
CLOSED
1
updated
Dec 05, 2022
Bug in software/tools/vme-flasher/svec-flasher.c
#61
· opened
Mar 19, 2021
by
René Geißler
CLOSED
1
updated
Nov 10, 2022
V0 - FMC Slot reference texts not aligned
#58
· opened
May 03, 2012
by
Erik van der Bij
feature
CLOSED
2
updated
Feb 12, 2019
V0 - C175 too close to inductor
#57
· opened
May 03, 2012
by
Erik van der Bij
bug
CLOSED
2
updated
Feb 12, 2019
V0 - Silkscreen texts too small
#56
· opened
May 03, 2012
by
Erik van der Bij
feature
CLOSED
2
updated
Feb 12, 2019
V0 - 3D model component too black
#55
· opened
May 03, 2012
by
Erik van der Bij
bug
CLOSED
2
updated
Feb 12, 2019
V0 - Front panel not yet designed
#54
· opened
May 04, 2012
by
Erik van der Bij
feature
CLOSED
2
updated
Feb 12, 2019
V0 - No easy way to store parameters for AFPGA
#53
· opened
Jun 05, 2012
by
Erik van der Bij
bug
CLOSED
2
updated
Feb 12, 2019
V0 - Clocks not conencted to global clock inputs.
#52
· opened
Jun 11, 2012
by
Projects
bug
CLOSED
2
updated
Feb 12, 2019
V0 - P12V boost converter disabled by default
#51
· opened
Jun 12, 2012
by
Projects
bug
CLOSED
4
updated
Feb 12, 2019
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