demo: differential measurements

parent 2cb843a5
......@@ -33,7 +33,12 @@ module system(
inout onewire,
// TDC
input tdc_signal
output test_clk_oe_n,
output test_clk_p,
output test_clk_n,
output [1:0] tdc_signal_oe_n,
input [1:0] tdc_signal_p,
input [1:0] tdc_signal_n
);
//------------------------------------------------------------------
......@@ -458,10 +463,11 @@ assign onewire = onewire_drivelow ? 1'b0 : 1'bz;
//---------------------------------------------------------------------------
// TDC
//---------------------------------------------------------------------------
wire tdc_calib;
wire [1:0] tdc_signal;
wire [1:0] tdc_calib;
tdc_hostif #(
.g_CHANNEL_COUNT(1),
.g_CHANNEL_COUNT(2),
.g_CARRY4_COUNT(124),
.g_RAW_COUNT(9),
.g_FP_COUNT(13),
......@@ -492,16 +498,39 @@ tdc_hostif #(
// startup calibration oscillator
wire cal_clk16x;
wire cal_clk;
wire test_clk;
tdc_ringosc #(
.g_LENGTH(31)
) calib_osc (
.en_i(~sys_rst),
.clk_o(cal_clk16x)
);
reg [3:0] cal_clkdiv;
reg [18:0] cal_clkdiv;
always @(posedge cal_clk16x) cal_clkdiv <= cal_clkdiv + 4'd1;
assign cal_clk = cal_clkdiv[3];
assign test_clk = cal_clkdiv[18];
assign tdc_calib = cal_clk;
assign tdc_calib = {2{cal_clk}};
// IO
assign test_clk_oe_n = 1'b0;
OBUFDS obuf_test_clk(
.O(test_clk_p),
.OB(test_clk_n),
.I(test_clk)
);
assign tdc_signal_oe_n[0] = 1'b1;
IBUFDS ibuf_tdc_signal0(
.I(tdc_signal_p[0]),
.IB(tdc_signal_n[0]),
.O(tdc_signal[0])
);
assign tdc_signal_oe_n[1] = 1'b1;
IBUFDS ibuf_tdc_signal1(
.I(tdc_signal_p[1]),
.IB(tdc_signal_n[1]),
.O(tdc_signal[1])
);
endmodule
......@@ -21,9 +21,19 @@ NET "led[2]" LOC = F18 | IOSTANDARD = "LVCMOS18";
NET "led[3]" LOC = C20 | IOSTANDARD = "LVCMOS18";
NET "onewire" LOC = D4 | IOSTANDARD = "LVCMOS25";
# ==== TDC inputs ====
# FIXME
NET "tdc_signal" LOC = AB11 | IOSTANDARD = LVCMOS25 | PULLDOWN;
# ==== TDC ====
NET "test_clk_oe_n" LOC = V17 | IOSTANDARD = "LVCMOS25";
NET "test_clk_p" LOC = W17 | IOSTANDARD = "LVDS_25";
NET "test_clk_n" LOC = Y18 | IOSTANDARD = "LVDS_25";
NET "tdc_signal_oe_n[0]" LOC = Y14 | IOSTANDARD = "LVCMOS25";
NET "tdc_signal_p[0]" LOC = R11 | IOSTANDARD = "LVDS_25";
NET "tdc_signal_n[0]" LOC = T11 | IOSTANDARD = "LVDS_25";
NET "tdc_signal_oe_n[1]" LOC = W11 | IOSTANDARD = "LVCMOS25";
NET "tdc_signal_p[1]" LOC = W12 | IOSTANDARD = "LVDS_25";
NET "tdc_signal_n[1]" LOC = Y12 | IOSTANDARD = "LVDS_25";
# ==== TDC core ====
NET "tdc/cmp_tdc/cmp_channelbank/g_single.cmp_channelbank/cmp_channel/muxed_signal" TIG;
NET "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[0].cmp_channel/muxed_signal" TIG;
NET "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[1].cmp_channel/muxed_signal" TIG;
......@@ -224,6 +224,7 @@ static void do_command(char *c)
else if(strcmp(token, "calinfo") == 0) calinfo();
else if(strcmp(token, "mraw") == 0) mraw();
else if(strcmp(token, "temp") == 0) temp();
else if(strcmp(token, "diff") == 0) diff();
else if(strcmp(token, "") != 0)
printf("Command not found\n");
......
......@@ -110,3 +110,51 @@ void mraw()
tdc->EIC_ISR = TDC_EIC_ISR_IE0;
}
}
#define CSV
void diff()
{
int pol0, pol1;
unsigned int rts0, rts1;
unsigned int ts0, ts1;
#ifndef CSV
int diff;
int rdiff;
#endif
if(!(tdc->CS & TDC_CS_RDY)) {
printf("Startup calibration not done\n");
return;
}
tdc->EIC_IER = TDC_EIC_IER_IE0|TDC_EIC_IER_IE1;
while(1) {
while((tdc->EIC_ISR & (TDC_EIC_ISR_IE0|TDC_EIC_IER_IE1)) != (TDC_EIC_ISR_IE0|TDC_EIC_IER_IE1)) {
if(readchar_nonblock()) return;
}
pol0 = pol1 = tdc->POL;
pol0 = !!(pol0 & 0x01);
pol1 = !!(pol1 & 0x02);
ts0 = tdc->MESL0;
ts1 = tdc->MESL1;
rts0 = tdc->RAW0;
rts1 = tdc->RAW1;
#ifdef CSV
printf("%d,%d,%d,%d,%d,%d\n", pol0, rts0, ts0, pol1, rts1, ts1);
#else
diff = ts0 - ts1;
if(diff < 0)
diff = -diff;
rdiff = rts0 - rts1;
if(rdiff < 0)
rdiff = -rdiff;
printf("0: %dps [%d/%d] 1: %dps [%d/%d] diff: %dps [%d]\n",
ts0*977/1000, rts0, pol0,
ts1*977/1000, rts1, pol1,
diff*977/1000, rdiff);
#endif
if(pol0 != pol1)
printf("Inconsistent polarities!\n");
tdc->EIC_ISR = TDC_EIC_ISR_IE0|TDC_EIC_ISR_IE1;
}
}
......@@ -22,5 +22,6 @@
void rofreq();
void calinfo();
void mraw();
void diff();
#endif /* __TDC_H */
......@@ -16,7 +16,7 @@
\title{Time to Digital Converter core for Spartan-6 FPGAs}
\author{S\'ebastien Bourdeauducq}
\date{October 2011}
\date{November 2011}
\begin{document}
\setlength{\parindent}{0pt}
\setlength{\parskip}{5pt}
......@@ -238,9 +238,9 @@ NET "cmp_tdc/cmp_channelbank/g_single.cmp_channelbank
Or, for multiple channels:
\begin{verbatim}
NET "cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank
/cmp_channel[0]/muxed_signal" TIG;
/g_channels[0].cmp_channel/muxed_signal" TIG;
NET "cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank
/cmp_channel[1]/muxed_signal" TIG;
/g_channels[1].cmp_channel/muxed_signal" TIG;
\end{verbatim}
One constraint must be added per channel, and the numbers ``0'', ``1'', ... incremented accordingly.
......
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