demo: floorplan calibration signal muxes and delay lines

4d250b87 · Sebastien Bourdeauducq · 549b4358 · 4d250b87
Commit 4d250b87 authored Nov 04, 2011 by Sebastien Bourdeauducq
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common.ucf demo/boards/spec/synthesis/common.ucf +6 -0

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--- a/demo/boards/spec/synthesis/common.ucf
+++ b/demo/boards/spec/synthesis/common.ucf
@@ -41,3 +41,9 @@ NET "tdc_signal_n[1]" LOC = Y12 | IOSTANDARD = "LVDS_25";
 # ==== TDC core ====
 NET "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[0].cmp_channel/muxed_signal" TIG;
 NET "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[1].cmp_channel/muxed_signal" TIG;
+INST "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[0].cmp_channel/Mmux_muxed_signal11" LOC = SLICE_X35Y0;
+INST "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[1].cmp_channel/Mmux_muxed_signal11" LOC = SLICE_X35Y0;
+INST "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[0].cmp_channel/cmp_delayline/g_carry4[0].g_firstcarry4.cmp_CARRY4" LOC = SLICE_X30Y2;
+INST "tdc/cmp_tdc/cmp_channelbank/g_multi.cmp_channelbank/g_channels[1].cmp_channel/cmp_delayline/g_carry4[0].g_firstcarry4.cmp_CARRY4" LOC = SLICE_X32Y2;