TDC core:1ad2392377d63be66d56e252e510d781915d9c4b commits
https://ohwr.org/project/tdc-core/commits/1ad2392377d63be66d56e252e510d781915d9c4b
2011-09-05T16:00:28Z
https://ohwr.org/project/tdc-core/commit/1ad2392377d63be66d56e252e510d781915d9c4b
demo: update headers
2011-09-05T16:00:28Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/c0b8236cd9075a524d6793b42bd9b59047907ddc
demo: basic lm32 design
2011-09-05T15:55:33Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/aa250eba3cadb73fd7ee22892c37c062778777d6
hostif: add description at the beginning of sources
2011-08-30T20:10:42Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/80c7bfed790cdfefca3235ac3dfa5dfc3cf4ecf0
core: add description at the beginning of sources
2011-08-30T20:08:25Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/9595cf582ce5164bf7be960fd8fad6ea88034250
test benches: add description at the beginning of sources
2011-08-30T19:39:42Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/20673c259339607efe3853d391b5625582212ce7
doc: simulation
2011-08-30T18:39:36Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/ab62438339fb8e87bc434de74f9d9d3eb81a3195
README: update
2011-08-28T19:08:34Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/16f157dfb2821d9a6f55587177be47a444599694
doc: reorder taps
2011-08-28T18:57:35Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/9dc6e0372a4299ce1a3647cbc4e521a7139158cd
doc: debug port
2011-08-28T18:47:52Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/e2f36b4dee9bcf24993f8dd8fb6f1406abb5ad53
doc: synthesis notes
2011-08-28T18:04:47Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/f384289a949270eb34c3a2a56dcb8c476a03fc79
doc: host interface
2011-08-28T17:47:15Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/4a084dcb4d3dc18e6d652baa5f3794f01b3f8b34
doc: ports
2011-08-28T17:35:17Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/084b8b224d9b6046916ed52014bc8b44804b56ee
lbc: enable retiming
2011-08-28T13:33:13Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/814967a37a11258eeabedec16836ca23857dc024
doc: synthesis and physical implementation
2011-08-28T13:29:28Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/e5ba229ffc1b5756252bc175bf5b030f07ef4acf
doc: calibration details
2011-08-28T13:10:47Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/a7f9a02151703a0757607df85b58fe01e9454ed8
doc: architecture overview
2011-08-28T11:29:31Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/87045ea4ff024fa1eb56d12fa655ec444fc6e3e8
doc: block diagram
2011-08-27T18:56:50Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/291fce0ad7513ed072201ea6239c15fea5a18ad5
hostif: reduce max channels to 8
2011-08-27T15:31:48Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/52efcaf676d93bafd3b3d3aa91aebb30a65b7a50
doc: add specifications
2011-08-27T15:25:01Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/48e6e04d2fa558babc334877c28c5e38ac756281
hostif: add hdlmake Manifest
2011-08-27T13:43:49Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/2de556c1f6e2818d3ed7de955344e48fed3554dc
controller: better test bench
2011-08-27T13:34:25Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/e30d63033a9677c1379517af1b02522b28ae9108
divider: fix counter width calculation
2011-08-27T13:13:51Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/9a91b41f10be5910816859652a0ef5984ae6aacc
controller: test bench
2011-08-27T12:50:21Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/fa9c5869521eae63af7ee3215cad641743054c62
controller: test bench skeleton
2011-08-26T21:13:53Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/5c8ecef1ea539cd06dd065dbaa657af9f52085fc
controller: work around GHDL bug
2011-08-26T21:00:29Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/169643f96ce75c5098e99f1d493e609fdb2b5362
hostif: add top-level to package
2011-08-26T16:46:06Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/1a8ac4cd66d228fc9e1d9ed8d4dd378cd01e93a2
hostif: fix VHDL problems
2011-08-26T16:43:25Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/b4ea135fd08559d521558043127f1004ddd15cb4
hostif: complete, untested
2011-08-26T16:23:43Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/9d6b7c7e59826ee3e2d99a35282bae8eeac91091
hostif: add generated Wishbone slave, declare component
2011-08-25T21:36:10Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/740a0bdb6aa833172da72fd8dabbbd3fd6186841
hostif: wbgen file generation script
2011-08-25T16:01:36Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/b954f9e1af8c5ba13ed16187482e1c4596b0110e
manifest: update file list
2011-08-23T21:51:18Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/8c7b312b339cc242309f29cf31783622d79c7495
Debug interface
2011-08-21T11:19:18Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/d9c1b8567ed4c4a63b5b30329d0293a80173d758
controller: done, untested
2011-08-21T09:28:32Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/8b4fd4d7d53a814b72a75d7af675501e6115acdd
doc: TIG constraint
2011-08-20T20:00:37Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/25797851911bc6551a21c4ca4bec923a75d5c97b
channel: register calibration select signal to avoid glitches
2011-08-20T18:46:24Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/65b364a80716bce7b2f4338ec79c7884695375d8
controller: build histogram
2011-08-20T17:27:55Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/aa88cac94333fe9524ee4aabca3440c7f4e1a8df
channelbank: fix signal names
2011-08-20T17:14:02Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/c168d7bb2d8dc25c4e5629717fe70d5fc098dd63
channel: hold values
2011-08-19T11:44:13Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/efae20d46daa34dcf80529575094fdf03fa1ce8a
Controller connections
2011-08-19T11:16:40Z
Sebastien Bourdeauducq
sebastien@milkymist.org
https://ohwr.org/project/tdc-core/commit/2c08f221e3ee3b7b8c082b66aa3b39ce46fc8c20
Channel bank: add histogram memory (untested)
2011-08-18T18:37:44Z
Sebastien Bourdeauducq
sebastien@milkymist.org