IO output duty cycle unstable on PMC S/N: 89285
All prototypes pass our IO test except S/N 89285 (see Test Plan and Test report, [1]).
Have you experienced this IO behaviour before with any of your boards?
Details:
1. Duty cycle/period on IO not stable at certain settings, example:
- 200MHz clock, 60% duty cycle, eb-clock -c X -H 3 -L2 dev/ttyUSB0
Image attached (IMG1).
2. Same settings zoomed out, trigger on rising edge, it seems to be correlated with 40ns period (25MHz)
Image attached (IMG2)
Comment to IMG2: on the screenshot there are 3 rising edges that are aligned on every trigger, they are divided by 40ns (third from the left, middle one, second from the right)
[1] https://www.ohwr.org/project/tr-pmc/commits/master/PMC_REVA/Test/FTRN-PMC_Test_Report.xls