White Rabbit Timing Receiver in PMC format
Project description
A White Rabbit Timing Receiver in PMC (PCI Mezzanine Card) format.
FTRN_PMC_REVA_2015-07-13_prototype-front.jpg
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Main features
- FPGA
- Altera Arria V GX (5AGXMA3D4F27I3N)
- CPLD
- Xilinx Coolrunner-II (XC2C64A)
- Miscellaneous
- On-board thermometer IC (DS18B20U+)
- Unique 64-bit identifier (DS18B20U+)
- Front panel
- 1x SFP port (White Rabbit compatible)
- 5x LEMO/SMC programmable I/Os capable of driving 3.3V @ 50 ohm
- 6x Programmable LEDs
Project information
- Design files
- General Machine Timing - GMT - System - GSI.
Contacts
Commercial producers
- Cosylab, Slovenia
General question about project
- Alexander Hahn - GSI, Germany
Status
Date | Event |
05-05-2014 | First specification written |
23-01-2015 | Created project and repository on OHWR. |
01-10-2015 | Design prototype is done. |
04-01-2016 | GSI received the first prototype. |
3 February 2016