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wr2rf-vme
Commit b7856715 authored by John Gill's avatar John Gill
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Added bistream configuration options from eRTM-14.

parent ccf09eea
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Showing with 7 additions and 7 deletions
hdl/syn/wr2rf_vme.tcl
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......@@ -42,13 +42,13 @@ report_utilization -hierarchical -file ${top}_utilization.rpt
report_io -file ${top}_pin.rpt
# bitstream configuration...
set_property CONFIG_VOLTAGE 1.8 [current_design]
set_property CFGBVS GND [current_design]
#set_property CONFIG_MODE SPIx8 [current_design]
#set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
#set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN div-2 [current_design]
#set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 1 [current_design]
set_property CONFIG_MODE SPIx1 [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
set_property CONFIG_VOLTAGE 2.5 [current_design]
set_property CFGBVS VCCO [current_design]
set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
write_bitstream -force ${projDir}/${top}.bit
#write_cfgmem -force -format mcs -interface spix8 -size 32 -loadbit "up 0x0 pcieg2_kcu105.bit" pcieg2_kcu105.mcs
......
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