Commit f8f4418a authored by Tristan Gingold's avatar Tristan Gingold

README: tell to create files.tcl

parent b7856715
To generate the wr2rf_vme fpga design, you must:
- run hdlmake in the current syn directory to generate a list of file
- run hdlmake in the current syn directory and generate the list of file
dependencies - specifically - files.tcl
$ hdlmake
$ make files.tcl
- run vivado to progress through the build phases (synth, opt, place, phys_opt
and route).
......
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