# SPDX-FileCopyrightText: 2023 CERN (home.cern)
#
# SPDX-License-Identifier: CERN-OHL-S-2.0+

# Load Quartus II Tcl Project package
package require ::quartus::project

# SCRIPT EXECUTION STARTS HERE
post_message "Executing A25 pre-flow script"

set project_name "A25_top"

set make_assignments 0

# Make sure that the right project is open
if {[is_project_open]} {
    if {[string compare $quartus(project) $project_name]} {
	project_close
	project_open -force $project_name
    }
} else {
    project_open -force $project_name
}

# project settings copied over from original A25 QSF file
set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHZ
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE ON
set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 3.3V
set_global_assignment -name CRC_ERROR_CHECKING OFF
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name DEVICE_MIGRATION_LIST "EP4CGX30CF23I7,EP4CGX150CF23I7,EP4CGX75CF23I7,EP4CGX50CF23I7"
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
set_global_assignment -name EDA_INPUT_DATA_FORMAT EDIF -section_id eda_design_synthesis
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT ON
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name FMAX_REQUIREMENT "100 MHz" -section_id refclk
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name GENERATE_RBF_FILE ON
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED WITH WEAK PULL-UP"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name STRATIXIII_UPDATE_MODE REMOTE
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF

source scripts/gen_ip_cores.tcl
source scripts/gen_pin_assignments.tcl

# Commit assignments
export_assignments

# SCRIPT EXECUTION ENDS HERE
post_message "A25 pre-flow script execution complete"
