Fix association order (and remove one extra useless generic).

f9a19cab · Tristan Gingold · f210991d · f9a19cab · f9a19cab · f9a19cab
Commit f9a19cab authored Oct 25, 2017 by Tristan Gingold
Showing with 8 additions and 9 deletions

VME64xCore_Top.vhd hdl/rtl/VME64xCore_Top.vhd +2 -3

VME_bus.vhd hdl/rtl/VME_bus.vhd +1 -2

vme64x_pack.vhd hdl/rtl/vme64x_pack.vhd +1 -0

xvme64x_core.vhd hdl/rtl/xvme64x_core.vhd +4 -4

No files found.
--- a/hdl/rtl/VME64xCore_Top.vhd
+++ b/hdl/rtl/VME64xCore_Top.vhd
@@ -408,8 +408,7 @@ begin
    generic map (
      g_CLOCK_PERIOD  => g_CLOCK_PERIOD,
      g_WB_DATA_WIDTH => g_WB_DATA_WIDTH,
-      g_WB_ADDR_WIDTH => g_WB_ADDR_WIDTH,
+      g_WB_ADDR_WIDTH => g_WB_ADDR_WIDTH
-      g_DECODE_AM     => g_DECODE_AM
    )
    port map (
      clk_i           => clk_i,
@@ -435,8 +434,8 @@ begin
      VME_DATA_DIR_o  => VME_DATA_DIR_o,
      VME_DATA_OE_N_o => VME_DATA_OE_N_o,
      VME_AM_i        => VME_AM_i,
-      VME_IACK_n_i    => s_VME_IACK_n,
      VME_IACKIN_n_i  => s_VME_IACKIN_n,
+      VME_IACK_n_i    => s_VME_IACK_n,
      VME_IACKOUT_n_o => VME_IACKOUT_n_o,
      -- WB signals

--- a/hdl/rtl/VME_bus.vhd
+++ b/hdl/rtl/VME_bus.vhd
@@ -71,8 +71,7 @@ entity VME_bus is
  generic (
    g_CLOCK_PERIOD  : integer;
    g_WB_DATA_WIDTH : integer;
-    g_WB_ADDR_WIDTH : integer;
+    g_WB_ADDR_WIDTH : integer
-    g_DECODE_AM     : boolean
  );
  port (
    clk_i           : in  std_logic;

--- a/hdl/rtl/vme64x_pack.vhd
+++ b/hdl/rtl/vme64x_pack.vhd
@@ -128,6 +128,7 @@ package vme64x_pack is
      g_CLOCK_PERIOD    : integer                         := c_CLOCK_PERIOD;
      g_WB_DATA_WIDTH   : integer                         := c_DATA_WIDTH;
      g_WB_ADDR_WIDTH   : integer                         := c_ADDR_WIDTH;
+      g_DECODE_AM       : boolean                         := true;
      g_USER_CSR_EXT    : boolean                         := false;
      g_MANUFACTURER_ID : std_logic_vector(23 downto 0)   := c_CERN_ID;
      g_BOARD_ID        : std_logic_vector(31 downto 0)   := c_SVEC_ID;

--- a/hdl/rtl/xvme64x_core.vhd
+++ b/hdl/rtl/xvme64x_core.vhd
@@ -214,7 +214,6 @@ begin  -- wrapper
      VME_BERR_o      => VME_BERR_o,
      VME_DTACK_n_o   => VME_DTACK_n_o,
      VME_RETRY_n_o   => VME_RETRY_n_o,
-      VME_RETRY_OE_o  => VME_RETRY_OE_o,
      VME_LWORD_n_i   => VME_LWORD_n_b_i,
      VME_LWORD_n_o   => VME_LWORD_n_b_o,
      VME_ADDR_i      => VME_ADDR_b_i,
@@ -230,6 +229,7 @@ begin  -- wrapper
      VME_DATA_OE_N_o => VME_DATA_OE_N_o,
      VME_ADDR_DIR_o  => VME_ADDR_DIR_o,
      VME_ADDR_OE_N_o => VME_ADDR_OE_N_o,
+      VME_RETRY_OE_o  => VME_RETRY_OE_o,
      DAT_i           => dat_in,
      DAT_o           => dat_out,
@@ -242,6 +242,8 @@ begin  -- wrapper
      WE_o            => master_o.we,
      STALL_i         => master_i.stall,
+      irq_level_i     => irq_level_i,
+      irq_vector_i    => irq_vector_i,
      user_csr_addr_o => user_csr_addr_o,
      user_csr_data_i => user_csr_data_i,
      user_csr_data_o => user_csr_data_o,
@@ -249,10 +251,8 @@ begin  -- wrapper
      user_cr_addr_o  => user_cr_addr_o,
      user_cr_data_i  => user_cr_data_i,
-      irq_i           => irq_i,
      irq_ack_o       => irq_ack_o,
-      irq_vector_i    => irq_vector_i,
+      irq_i           => irq_i
-      irq_level_i     => irq_level_i
    );
  master_o.dat <= dat_out(31 downto 0);