HDL library: now uses general-cores (genrams) to instantiate RAM/FIFO primitives
git-svn-id: http://svn.ohwr.org/wishbone-gen@23 4537843c-45c2-4d80-8546-c3283569414f
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lib/Manifest.py
0 → 100644
lib/wbgen2_dpssram.vhd
0 → 100644
lib/wbgen2_fifo_async.vhd
0 → 100644
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