You only need to add sdb_vendor in your *.wb to generate the file

{...
hdl_entity = "wb_clk_counters";
sdb_vendor  = 0x7501;
sdb_version = 1;
...
}

Then you can generate with the new example/Makefile by calling:

	make pts

or

	wbgen2 --vo=wb_clk_counters.vhdl --vpo=wb_clk_counters_pkg.vhdl
--hstyle=record wb_clk_counters.wb

IMPORTANT: This new option requires lua-md5 library

	sudo apt-get install lua-md5

This field is usefull when the register works with fixed point value

We can get a warning when trying to shift a 32bits '1' 32 times, so we use a 64bit '1'.

Generate extended headers with name, prefix, description, access type.

cgen_vhdl: fixed f_x_to_zero() function in generated VHDL package causing synthesis error on Mentor Precision

initial support for 'optional' parameter (conditional instantiation of RAMs and FIFOs depending on a user-defined generic value)

fixed readback value of write-only (monostable) bits to 0. See Wesley's message on white-rabbit-dev, dated 12/02/2013 for explanation

git-svn-id: http://svn.ohwr.org/wishbone-gen@27 4537843c-45c2-4d80-8546-c3283569414f

VHDL code generator: use separate records for in and out registers to avoid problems with tristate2logic in XIlinx tools

git-svn-id: http://svn.ohwr.org/wishbone-gen@26 4537843c-45c2-4d80-8546-c3283569414f

git-svn-id: http://svn.ohwr.org/wishbone-gen@25 4537843c-45c2-4d80-8546-c3283569414f

git-svn-id: http://svn.ohwr.org/wishbone-gen@24 4537843c-45c2-4d80-8546-c3283569414f