[wr_streamers] fixed latency bugfix

When frames were sent to close to each other (high frequency), the timestamp of incoming frame would reset the delay counter of the previously received frame. This could potentially cause infinite fixed delay... Now, in such case, the counter is not reseted and so the following (too closely) frame will be exposed to the user immediatelly.

[wr_streamers] fixed latency bugfix
When frames were sent to close to each other (high frequency), the timestamp of incoming frame would reset the delay counter of the previously received frame. This could potentially cause infinite fixed delay... Now, in such case, the counter is not reseted and so the following (too closely) frame will be exposed to the user immediatelly.
3e2985c4 · Maciej Lipinski · Grzegorz Daniluk · 043c0d3e · 3e2985c4
Commit 3e2985c4 authored May 05, 2017 by Maciej Lipinski Committed by Grzegorz Daniluk Jun 19, 2017
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xrx_streamer.vhd modules/wr_streamers/xrx_streamer.vhd +9 -15

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--- a/modules/wr_streamers/xrx_streamer.vhd
+++ b/modules/wr_streamers/xrx_streamer.vhd
@@ -299,29 +299,15 @@ begin  -- rtl
      data_i         => fsm_in.sof,
      synced_o       => timestamped);

-  -- count delay after reception of frame
-  p_delay_cnt : process(clk_sys_i)
-  begin
-    if rising_edge(clk_sys_i) then
-      if rst_n_i = '0' or timestamped = '1' then
-        delay_cnt <= c_timestamper_delay;
-      else
-       -- increase by two since the latency value reported by streamers is
-       -- expressed in 8ns cycles and we work here in 16ns cycles 
-        delay_cnt <= delay_cnt + 2;
-      end if;
-    end if;
-  end process;
-
  -- introduce fixed latency, if configured to do so
  p_fixed_latency_fsm : process(clk_sys_i)
  begin
-
    if rising_edge(clk_sys_i) then
      if rst_n_i = '0' then
        delay_state        <= DISABLED;
        rx_latency_stored  <= (others=>'0');
        rx_dreq_allow      <= '1';
+        delay_cnt          <= c_timestamper_delay;
      else
        case delay_state is
          when DISABLED => 
@@ -329,6 +315,7 @@ begin  -- rtl
              delay_state        <= ALLOW;
            end if;
            rx_latency_stored  <= (others=>'0');
+            delay_cnt          <= c_timestamper_delay;
            rx_dreq_allow      <= '1';
          when ALLOW =>
            if unsigned(rx_streamer_cfg_i.fixed_latency) = c_fixed_latency_zero then
@@ -338,11 +325,18 @@ begin  -- rtl
              rx_latency_stored <= rx_latency;
              delay_state       <= DELAY;
            end if;
+            if(timestamped = '1') then
+              delay_cnt         <= c_timestamper_delay;
+            else
+              delay_cnt <= delay_cnt + 2;
+            end if;
          when DELAY =>
            if unsigned(rx_streamer_cfg_i.fixed_latency) <= delay_cnt + rx_latency_stored then
              rx_latency_stored  <= (others=>'0');
              rx_dreq_allow      <= '1';
              delay_state        <= ALLOW;
+            else
+              delay_cnt <= delay_cnt + 2;
            end if;
        end case;
      end if;