wr_endpoint: ep_rx_wb_master: improved error handling

6b641c7a · Tomasz Wlostowski · 73d02fe3 · 6b641c7a
Commit 6b641c7a authored Oct 27, 2011 by Tomasz Wlostowski
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ep_rx_wb_master.vhd modules/wr_endpoint/ep_rx_wb_master.vhd +7 -6

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--- a/modules/wr_endpoint/ep_rx_wb_master.vhd
+++ b/modules/wr_endpoint/ep_rx_wb_master.vhd
@@ -6,7 +6,7 @@
 -- Author     : Tomasz Wlostowski
 -- Company    : CERN BE-CO-HT
 -- Created    : 2009-06-22
-- Last update: 2011-10-24
+-- Last update: 2011-10-27
 -- Platform   : FPGA-generic
 -- Standard   : VHDL'93
 -------------------------------------------------------------------------------
@@ -107,17 +107,18 @@ begin  -- behavioral
              src_out_int.sel(0) <= not snk_fab_i.bytesel;
            end if;

-            if(src_wb_i.stall = '1' and snk_fab_i.dvalid = '1') then
-              state   <= FLUSH_STALL;
+
+            if(snk_fab_i.error = '1') then
+              state <= THROW_ERROR;
+            elsif(src_wb_i.stall = '1' and snk_fab_i.dvalid = '1') then
+              state <= FLUSH_STALL;
            end if;

            if(snk_fab_i.eof = '1')then
              state <= FINISH_CYCLE;
            end if;

-            if(snk_fab_i.error = '1') then
-              state <= THROW_ERROR;
-            end if;
+            
            
            tmp_adr <= snk_fab_i.addr;
            tmp_dat <= snk_fab_i.data;