Commit 80438fd8 authored by Peter Jansweijer's avatar Peter Jansweijer

Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non…

Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non driven FPGA pin after configuration done.
(it did break the JTAG chain after configuration.
parent 55cf74d5
......@@ -149,6 +149,7 @@ entity spec7_write_top is
reset_n_i : in std_logic;
suicide_n_o : out std_logic;
wdog_n_o : out std_logic;
prsnt_m2c_l_i : in std_logic;
------------------------------------------------------------------------------
-- Digital I/O Bulls-Eye connections
......@@ -278,6 +279,7 @@ begin -- architecture top
-- Never trigger PS_POR or PROGRAM_B
suicide_n_o <= '1';
wdog_n_o <= '1';
-- prsnt_m2c_l_i isn't used but must be defined as input.
-----------------------------------------------------------------------------
-- The WR PTP core board package (WB Slave + WB Master)
......
......@@ -188,6 +188,8 @@ set_property PACKAGE_PIN AC22 [get_ports suicide_n_o]
set_property IOSTANDARD LVCMOS25 [get_ports suicide_n_o]
set_property PACKAGE_PIN AC21 [get_ports wdog_n_o]
set_property IOSTANDARD LVCMOS25 [get_ports wdog_n_o]
set_property PACKAGE_PIN V19 [get_ports prsnt_m2c_l_i]
set_property IOSTANDARD LVCMOS25 [get_ports prsnt_m2c_l_i]
# SI570
# Bank 12 (HR) VCCO - 2.5 V
......
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