CLBv3: UCF use Crystek CVPD-922 124.992 MHz

a6256755 · Peter Jansweijer · Grzegorz Daniluk · a4db868b · a6256755
Commit a6256755 authored Dec 01, 2017 by Peter Jansweijer Committed by Grzegorz Daniluk Dec 13, 2017
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clbv3_wr_ref_top.ucf top/clbv3_ref_design/clbv3_wr_ref_top.ucf +4 -4

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--- a/top/clbv3_ref_design/clbv3_wr_ref_top.ucf
+++ b/top/clbv3_ref_design/clbv3_wr_ref_top.ucf
@@ -3,10 +3,10 @@
 #   ---------------------------------------------------------------------------

 #   -- Local oscillators
-#NET "clk_125m_dmtd_p_i" LOC = J19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V -- CVPD-922-124.992 MHz PLL reference
-#NET "clk_125m_dmtd_n_i" LOC = H19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V
-NET "clk_125m_dmtd_p_i" LOC = K18  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V -- FRETHE025 5x25 MHz PLL reference
-NET "clk_125m_dmtd_n_i" LOC = K19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V
+NET "clk_125m_dmtd_p_i" LOC = J19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V -- CVPD-922-124.992 MHz PLL reference
+NET "clk_125m_dmtd_n_i" LOC = H19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V
+#NET "clk_125m_dmtd_p_i" LOC = K18  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V -- FRETHE025 5x25 MHz PLL reference
+#NET "clk_125m_dmtd_n_i" LOC = K19  | IOSTANDARD = "LVDS_25"; #Bank 15 VCCO - 2.5 V
 NET "clk_125m_dmtd_p_i" TNM_NET = clk_125m_dmtd_p_i;
 TIMESPEC TS_dmtd_clk_p_i = PERIOD "clk_125m_dmtd_p_i" 8 ns HIGH 50%;
 NET "clk_125m_dmtd_n_i" TNM_NET = clk_125m_dmtd_n_i;