Commits · 832831cc54d56c76c03361e990a03e4efb5c351d · Projects / White Rabbit core collection · Open Hardware Repository

02 May, 2012 1 commit
- timing/dmtd_with_deglitcher: optional /2 input divider for FPGA routing improvement · 832831cc
  Tomasz Wlostowski authored May 02, 2012
  
  832831cc
30 Apr, 2012 3 commits
- spec_top: dedicated clock for gtp transceiver · 4f86239f
  Grzegorz Daniluk authored Apr 30, 2012
  
  4f86239f
- platform/xilinx/wr_gtp_phy: simpler clocking for Spartan-6 wrapper · 3bdd3c88
  Tomasz Wlostowski authored Apr 30, 2012
  
  3bdd3c88
- wr_endpoint: cleaned up vague assignments to rx_even flag · 3a404a4d
  Tomasz Wlostowski authored Apr 30, 2012
  
  3a404a4d
27 Apr, 2012 1 commit
- wr_core: enlarge RAM size to 80kB · 2e277e2a
  Grzegorz Daniluk authored Apr 27, 2012
  
  2e277e2a
26 Apr, 2012 2 commits
- wr_core: wired clk_aux clock (1 channel), default values for inputs, added… · abeeb4fd
  Tomasz Wlostowski authored Apr 26, 2012
```
wr_core: wired clk_aux clock (1 channel), default values for inputs, added tm_link_up_o output and wired aux DAC signals
```
  abeeb4fd
- modules/wr_softpll_ng/wr_softpll_ng.vhd: drive (previously unconnected) out_locked_o output · 9e786c9d
  Tomasz Wlostowski authored Apr 26, 2012
  
  9e786c9d
24 Apr, 2012 4 commits
- wr_pps_gen: re-generated WB slave using new wbgen2 · 1d310331
  Tomasz Wlostowski authored Apr 24, 2012
  
  1d310331
- wr_mini_nic: txtsu_valid_i renamed to txtsu_stb_i · e05f2b2c
  Grzegorz Daniluk authored Apr 24, 2012
  
  e05f2b2c
- wr_mini_nic: adding ts_incorrect input · 4170e45e
  Grzegorz Daniluk authored Apr 24, 2012
  
  4170e45e
- wr_pps_gen: fixed ns_overflow assertion during counter adjustment bug · 15662e50
  Tomasz Wlostowski authored Apr 24, 2012
  
  15662e50
23 Apr, 2012 2 commits
- wr_pps_gen/wr_pps_gen.vhd: sync CNT_ADJ done flag with pps_valid_o signal · 03e145bf
  Tomasz Wlostowski authored Apr 23, 2012
  
  03e145bf
- wr_endpoint/xwr_endpoint.vhd: wire pps_valid_i line of the wrapped Endpoint · bf558bf0
  Tomasz Wlostowski authored Apr 23, 2012
  
  bf558bf0
20 Apr, 2012 5 commits
- wrcore: parametrized number of clk_aux inputs · d8fb37e6
  Grzegorz Daniluk authored Apr 20, 2012
  
  d8fb37e6
- spec_top: connect external clock (10MHz) and pps input from DIO · 4b87684a
  Grzegorz Daniluk authored Apr 20, 2012
  
  4b87684a
- wrcore: feed external clk input in pps_gen · f107d155
  Grzegorz Daniluk authored Apr 20, 2012
  
  f107d155
- wrcore: connect external pps to pps_gen and configure its generics · 5d30de18
  Grzegorz Daniluk authored Apr 20, 2012
  
  5d30de18
- wrcore: update xwb_pps_gen component in wrcore_pkg · e9574aed
  Grzegorz Daniluk authored Apr 20, 2012
  
  e9574aed
19 Apr, 2012 1 commit
- platform/xilinx/wr_gtp_phy: fixed divider configuration fot 62.5 MHz GTX reference · b8482524
  Tomasz Wlostowski authored Apr 19, 2012
  
  b8482524
16 Apr, 2012 4 commits
- modules/wr_pps_gen: disabled chipscope instance · 025827c9
  Tomasz Wlostowski authored Apr 16, 2012
  
  025827c9
- modules/wr_pps_gen: added external PPS input and resynchronization of internal… · 055cbabb
  Tomasz Wlostowski authored Apr 16, 2012
```
modules/wr_pps_gen: added external PPS input and resynchronization of internal PPS vs external reference and local clock
```
  055cbabb
- wr_softpll_ng/spll_wb_slave: added EXT_REF_PRESENT flag · 85ba1e88
  Tomasz Wlostowski authored Apr 16, 2012
  
  85ba1e88
- wr_softpll_ng/spll_bangbang_pd.vhd: correct reference signal detection · cd48858f
  Tomasz Wlostowski authored Apr 16, 2012
  
  cd48858f
13 Apr, 2012 1 commit
- wr_core: without reversing softpll dmtd inputs main pll locks much faster · 35723911
  Grzegorz Daniluk authored Apr 13, 2012
  
  35723911
12 Apr, 2012 4 commits
- wrc_core: softpll_ng with external clock input, updated SPEC demo top level · d783a467
  Tomasz Wlostowski authored Apr 12, 2012
  
  d783a467
- wr_softpll_ng: top level with bang-bang PD and external 10 MHz clock input · 49cb74e5
  Tomasz Wlostowski authored Apr 12, 2012
  
  49cb74e5
- wr_softpll_ng: bang-bang phase detector for 10MHz external clock input · 75bf9994
  Tomasz Wlostowski authored Apr 12, 2012
  
  75bf9994
- wr_softpll_ng: updated WB slave with external 10MHz input-related registers · aeb8a167
  Tomasz Wlostowski authored Apr 12, 2012
  
  aeb8a167
02 Apr, 2012 12 commits
- Fix the GSI project files to include SoftPLL_ng · 4a586cf4
  Wesley W. Terpstra authored Apr 02, 2012
  
  4a586cf4
- connect SFP i2c on the SCU · fc425f2c
  Wesley W. Terpstra authored Apr 02, 2012
  
  fc425f2c
- Do not start the LM32 up in restarted state. · a5034bdd
  Wesley W. Terpstra authored Apr 02, 2012
```
This breaks preloaded firmware and GSI's firmware loading tool.
```
  a5034bdd
- Add the second 1-wire required by the new wr-core toplevel · ec5be877
  Wesley W. Terpstra authored Mar 29, 2012
  
  ec5be877
- Merge branch 'gsi_clean_history' into wishbonized · 8a53e8dd
  Wesley W. Terpstra authored Apr 02, 2012
```
Conflicts:
	modules/wrc_core/wr_core.vhd
	modules/wrc_core/wrcore_pkg.vhd
	modules/wrc_core/xwr_core.vhd
```
  8a53e8dd
- Add the new repository for etherbone · 3eecd1a4
  Wesley W. Terpstra authored Mar 27, 2012
  
  3eecd1a4
- Hit the timestamp requested exactly (not 1 cycle later) · dafa6802
  Wesley W. Terpstra authored Mar 21, 2012
  
  dafa6802
- Top file · c2e4dcf6
  Stefan Rauch authored Mar 21, 2012
  
  c2e4dcf6
- First attempt to enable 1-wire on SCU · b465dcb3
  Stefan Rauch authored Mar 20, 2012
  
  b465dcb3
- changed logic analyser IOs, added ECA ports · f2b94b45
  Mathias Kreider authored Mar 21, 2012
  
  f2b94b45
- first scu version with timestamping and eca unit · c8e63e3c
  Stefan Rauch authored Mar 20, 2012
  
  c8e63e3c
- Don't forget to connect the output pins · ed2a2b79
  Wesley W. Terpstra authored Mar 19, 2012
  
  ed2a2b79