WR streamers: fixed latency implementation only works for one specific case
The fixed latency implementation in the Rx streamer uses a latency
counter that is incremented by two (reference clock cycles) for each
tick of the system clk.
This operation assumes that the reference clock (clk_ref_i) frequency
is double the system clock (clk_sys_i) frequency.
This means that the current implementation is correct only for the
factor 2 scenario.
This should be fixed to work for more generic scenarios. Probably using
a function in the hdl to workout the relationship between the
frequencies.
Also what happens if the ref frequency is not an integer multiple of the
sys clk frequency?