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Tomasz Wlostowski authored
This may fix the WRs locking offsets issue & save a lot of FPGA resources. Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
0f1615da
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fabric | ||
timing | ||
uart | ||
wr_dacs | ||
wr_eca | ||
wr_endpoint | ||
wr_mini_nic | ||
wr_pps_gen | ||
wr_softpll_ng | ||
wr_tbi_phy | ||
wr_tlu | ||
wrc_core |