White Rabbit PTP Core
WR PTP Core external interfaces
WR PTP Core block diagram
Building WR PTP Core:
To perform the steps below you would need a computer with Linux operating system. Building WR PTP Core firmware consist of two steps: synthesizing HDL project and compiling LM32 firmware. The former requires hdlmake tool (https://www.ohwr.org/project/hdl-make) while the latter, lm32 toolchain. The step-by-step procedure is listed below. Please notice that you can add the $PATH variable modifications to your .bashrc file. Thus the hdlmake and lm32 toolchain directories would be always automatically added to $PATH.
1. create a new directory
$ mkdir wrpc
$ cd wrpc
Synthesizing HDL:
2. clone the hdlmake git repo:
$ git clone git:https://www.ohwr.org/misc/hdl-make.git
3. add hdlmake binary location to PATH variable so it could be called from any location:
$ export PATH=`pwd`/hdl-make:$PATH
4. please, make sure you have the Xilinx ISE-related variables set from the execution of settings32.sh script from your Xilinx ISE installation directory (default location is /opt/Xilinx//ISE_DS/settings32.sh ). Current version od hdlmake requires the correction of $XILINX system variable after the script. This issue is already reported to the author of the tool and should be fixed soon. Meanwhile, you have to set $XILINX to (the command for default installation location):
$ export XILINX=/opt/Xilinx/<version>/ISE_DS
5. clone wr-cores git repo which contains HDL core for WR PTP Core:
$ git clone git:https://www.ohwr.org/hdl-core-lib/wr-cores.git
$ cd wr-cores
6. create Makefile for synthesis using hdlmake:
$ cd syn/spec_1_1/wr_core_demo/
$ hdlmake
7. synthesize the project:
$ make
as the result the spec_top.bin file will be generated.
Compiling LM32 firmware:
8. go back to the wrpc directory created in the 1st step:
$ cd ../../../../
9. download the lm32 toolchain from ohwr:
$ wget https://www.ohwr.org/project/wr-cores/uploads/a2e8eeba448fbc8d580e68004e6f6c7f/lm32.tar.xz
10. unpack the toolchain:
$ tar xJf lm32.tar.xz
11. add toolchain binaries to PATH variable:
$ export PATH=`pwd`/lm32/bin:$PATH
12. clone the git repo with software for WR PTP Core:
$ git clone git:https://www.ohwr.org/hdl-core-lib/wr-cores/wrpc-sw.git
$ cd wrpc-sw
13. the WRPC software git repository has a ptp-noposix repository defined as a submodule, it has to be fetched first before building the software binary:
$ git submodule init
$ git submodule update
14. compile the LM32 firmware, the Etherbone support can be turned on/off by modifying the WITH_ETHERBONE flag inside Makefile:
$ make
The decision whether WR PTP should run in WR Master or WR Slave mode is no longer made at compilation time, but later by executing appropriate WR Shell commands. The firmware binary created at this point is wrc.bin file.
15. Both FPGA and LM32 binaries can be loaded into SPEC board using spec-sw package as described in its manual: https://www.ohwr.org/project/spec-sw/wikis/documents
WR PTP Core shell:
After connecting the UART console (either by using physical USB-UART or vUART) the WRPC Shell is available and can be used to configure the module. The full list of supported commands with their arguments is available here: *WR PTP Core shell commands*.
When WRPC starts for the first time on a new SPEC board it is important to create the SFP database with calibration parameters and the init script that will be executed every time after the core resets. This information is stored inside FMC Mezzanine's EEPROM. In this release of WR PTP Core only WRPC Shell can be used to build the database and script but there is a set of tools coming in wrpc-sw and spec-sw repos to make it possible also directly from the host PC. It will take the content from .bin or.tlv file and write it to EEPROM chip using the special kernel module.
Before executing further commands, stop the WR PTP daemon that was automatically started in default configuration:
wrc# ptp stop
Calibration database
First you have to create the empty database in EEPROM:
wrc# sfp erase
The list of supported SFPs can be found on a wiki
page
The example below adds two Axcen SFP transceivers widely used in White
Rabbit development and demos together with the calibration parameters
associated with them:
wrc# sfp add AXGE-1254-0531 46407 177093 73622176
wrc# sfp add AXGE-3454-0531 46407 177093 -73622176
At this point you should call the Shell commands to detect the SFP plugged into the SPEC board, match it to one of those stored in database and run the calibration procedure that will measure the t2/t4 phase transition point:
wrc# ptp stop
wrc# sfp detect
wrc# sfp match
wrc# calibration force
Measured value will be then stored inside the structure of calibration database in EEPROM so that it could be used next time when WRPC starts. This calibration function should be executed only once but for every new FPGA firmware synthesized from wr-cores repository. That means you don't have to repeat it every time something gets changed in LM32 software, but you have to repeat it every time you synthesize new FPGA bitstream.
Init script
Creating the init script inside FMC EEPROM is very convenient way of ensuring that WRPC will always start automatically and configure itself to the required functionality. Its content depends on particular use case but the basic ones for running WRPC in WR Slave and WR Master mode are presented below:
Creating WRPC init script for WR Slave mode:
wrc# init erase
wrc# init add ptp stop
wrc# init add sfp detect
wrc# init add sfp match
wrc# init add calibration
wrc# init add mode slave
wrc# init add ptp start
Creating WRPC init script for WR Master mode:
wrc# init erase
wrc# init add ptp stop
wrc# init add sfp detect
wrc# init add sfp match
wrc# init add calibration
wrc# init add mode master
wrc# init add ptp start
Plase notice that both those examples contain the call of calibration command. However, without force parameter it just tries to read t2/t4 phase transition value stored previously in EEPROM.
Running the Core:
Having the SFP database and init script stored in FMC EEPROM, the WRPC will always execute the script after being programmed or when coming back from reset state. Then the monitoring function can be executed to check the synchronization status:
wrc# gui
or the status can be continuously reported as the one log-line per second:
wrc# stat cont
To return back to WRPC Shell prompt please press Esc key.