ep_pcs_tbi_mdio_wb

WR Endpoint 1000base-X TBI PCS register block

Contents:

1. Memory map summary
2. HDL symbol
3. Register description
3.1. MDIO Control Register
3.2. MDIO Status Register
3.3. MDIO PHY Identification Register 1
3.4. MDIO PHY Identification Register 2
3.5. MDIO Auto-Negotiation Advertisement Register
3.6. MDIO Auto-Negotiation Link Partner Ability Register
3.7. MDIO Auto-Negotiation Expansion Register
3.8. MDIO Extended Status Register
3.9. WhiteRabbit-specific Configuration Register

1. Memory map summary

H/W Address Type Name VHDL/Verilog prefix C prefix
0x0 REG MDIO Control Register mdio_mcr MCR
0x1 REG MDIO Status Register mdio_msr MSR
0x2 REG MDIO PHY Identification Register 1 mdio_physid1 PHYSID1
0x3 REG MDIO PHY Identification Register 2 mdio_physid2 PHYSID2
0x4 REG MDIO Auto-Negotiation Advertisement Register mdio_advertise ADVERTISE
0x5 REG MDIO Auto-Negotiation Link Partner Ability Register mdio_lpa LPA
0x6 REG MDIO Auto-Negotiation Expansion Register mdio_expansion EXPANSION
0xf REG MDIO Extended Status Register mdio_estatus ESTATUS
0x10 REG WhiteRabbit-specific Configuration Register mdio_wr_spec WR_SPEC

2. HDL symbol

rst_n_i MDIO Control Register:
clk_sys_i mdio_mcr_uni_en_o
wb_adr_i[4:0] mdio_mcr_anrestart_o
wb_dat_i[31:0] mdio_mcr_pdown_o
wb_dat_o[31:0] mdio_mcr_anenable_o
wb_cyc_i mdio_mcr_loopback_o
wb_sel_i[3:0] mdio_mcr_reset_o
wb_stb_i  
wb_we_i MDIO Status Register:
wb_ack_o mdio_msr_lstatus_i
wb_stall_o lstat_read_notify_o
mdio_msr_rfault_i
mdio_msr_anegcomplete_i
 
MDIO PHY Identification Register 1:
 
MDIO PHY Identification Register 2:
 
MDIO Auto-Negotiation Advertisement Register:
mdio_advertise_pause_o[1:0]
mdio_advertise_rfault_o[1:0]
 
MDIO Auto-Negotiation Link Partner Ability Register:
mdio_lpa_full_i
mdio_lpa_half_i
mdio_lpa_pause_i[1:0]
mdio_lpa_rfault_i[1:0]
mdio_lpa_lpack_i
mdio_lpa_npage_i
 
MDIO Auto-Negotiation Expansion Register:
 
MDIO Extended Status Register:
 
WhiteRabbit-specific Configuration Register:
mdio_wr_spec_tx_cal_o
mdio_wr_spec_rx_cal_stat_i
mdio_wr_spec_cal_crst_o
mdio_wr_spec_bslide_i[4:0]

3. Register description

3.1. MDIO Control Register

HW prefix: mdio_mcr
HW address: 0x0
C prefix: MCR
C offset: 0x0
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
RESET LOOPBACK SPEED100 ANENABLE PDOWN ISOLATE ANRESTART FULLDPLX
7 6 5 4 3 2 1 0
CTST SPEED1000 UNI_EN RESV[4:0]

3.2. MDIO Status Register

HW prefix: mdio_msr
HW address: 0x1
C prefix: MSR
C offset: 0x4
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
100BASE4 100FULL 100HALF 10FULL 10HALF 100FULL2 100HALF2 ESTATEN
7 6 5 4 3 2 1 0
UNIDIRABLE MFSUPPRESS ANEGCOMPLETE RFAULT ANEGCAPABLE LSTATUS JCD ERCAP

3.3. MDIO PHY Identification Register 1

HW prefix: mdio_physid1
HW address: 0x2
C prefix: PHYSID1
C offset: 0x8
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
OUI[15:8]
7 6 5 4 3 2 1 0
OUI[7:0]

3.4. MDIO PHY Identification Register 2

HW prefix: mdio_physid2
HW address: 0x3
C prefix: PHYSID2
C offset: 0xc
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
OUI[5:0] MMNUM[5:4]
7 6 5 4 3 2 1 0
MMNUM[3:0] REV_NUM[3:0]

3.5. MDIO Auto-Negotiation Advertisement Register

HW prefix: mdio_advertise
HW address: 0x4
C prefix: ADVERTISE
C offset: 0x10
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
NPAGE RSVD1 RFAULT[1:0] RSVD2[2:0] PAUSE[1:1]
7 6 5 4 3 2 1 0
PAUSE[0:0] HALF FULL RSVD3[4:0]

3.6. MDIO Auto-Negotiation Link Partner Ability Register

HW prefix: mdio_lpa
HW address: 0x5
C prefix: LPA
C offset: 0x14
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
NPAGE LPACK RFAULT[1:0] RSVD2[2:0] PAUSE[1:1]
7 6 5 4 3 2 1 0
PAUSE[0:0] HALF FULL RSVD3[4:0]

3.7. MDIO Auto-Negotiation Expansion Register

HW prefix: mdio_expansion
HW address: 0x6
C prefix: EXPANSION
C offset: 0x18
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
RSVD2[12:5]
7 6 5 4 3 2 1 0
RSVD2[4:0] ENABLENPAGE LWCP RSVD1

3.8. MDIO Extended Status Register

HW prefix: mdio_estatus
HW address: 0xf
C prefix: ESTATUS
C offset: 0x3c
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
1000_XFULL 1000_XHALF 1000_TFULL 1000_THALF RSVD1[11:8]
7 6 5 4 3 2 1 0
RSVD1[7:0]

3.9. WhiteRabbit-specific Configuration Register

HW prefix: mdio_wr_spec
HW address: 0x10
C prefix: WR_SPEC
C offset: 0x40
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - BSLIDE[4:4]
7 6 5 4 3 2 1 0
BSLIDE[3:0] - CAL_CRST RX_CAL_STAT TX_CAL