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White Rabbit Network Interface Card
Commit 45338156 authored by Adam Wujek's avatar Adam Wujek 💬 Committed by Miguel Jimenez Lopez
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userspace/tools: remove wrs_port_tx_control 

The tool wrs_port_tx_control is not needed anymore, its functionality (putting
the link down) is available by performing:
ifconfig <port> down
Such functionality was added in the commit:
[Feature: 1336] kernel/wr_nic: disable SFP when interface is down

Revert the following commits:
2b6c0bc2 userspace/tools: wrs_port_tx_control, rename network interfaces from wrX to wriX+1
ceb0c512 userspace/tools/wrs_port_tx_control: Include some defines
97d8878d userspace/tools/wrs_port_tx_control: initialise register address
35a63cd9 kernel/wb-regs: Added address offsets to endpoint-mdio.h
d11514e5 userspace/tools/wrs_port_tx_control: added unistd.h
3184c2a7 doc/wrs-user-manual: added description of wrs_port_tx_control
4da29df3 userspace/tools: dynamically check maximum port number in wr_port_tx_control
4244c894 userspace/tools: added a program to control the TX on a WRS port
Signed-off-by: Adam Wujek's avatarAdam Wujek <adam.wujek@cern.ch>
parent c028713d
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Showing with 2 additions and 11 deletions
kernel/wbgen-regs/endpoint-mdio.h
View file @ 45338156
......@@ -10,8 +10,8 @@
*/
#ifndef __WBGEN2_REGDEFS_ENDPOINT_MDIO_WB
#define __WBGEN2_REGDEFS_ENDPOINT_MDIO_WB
#ifndef __WBGEN2_REGDEFS_ENDPOINT-MDIO_WB
#define __WBGEN2_REGDEFS_ENDPOINT-MDIO_WB
#ifdef __KERNEL__
#include <linux/types.h>
......@@ -36,7 +36,6 @@
/* definitions for register: MDIO Control Register */
#define MDIO_MCR_ADDRESS 0x0
/* definitions for field: Reserved in reg: MDIO Control Register */
#define MDIO_MCR_RESV_MASK WBGEN2_GEN_MASK(0, 5)
......@@ -93,7 +92,6 @@
#define MDIO_MCR_RESET WBGEN2_GEN_MASK(15, 1)
/* definitions for register: MDIO Status Register */
#define MDIO_MSR_ADDRESS 0x4
/* definitions for field: Extended Capability in reg: MDIO Status Register */
#define MDIO_MSR_ERCAP_MASK WBGEN2_GEN_MASK(0, 1)
......@@ -183,7 +181,6 @@
#define MDIO_MSR_100BASE4_R(reg) WBGEN2_GEN_READ(reg, 15, 1)
/* definitions for register: MDIO PHY Identification Register 1 */
#define MDIO_PHYSID_ADDRESS 0x8
/* definitions for field: Organizationally Unique Identifier (bits 7-21) in reg: MDIO PHY Identification Register 1 */
#define MDIO_PHYSID1_OUI_MASK WBGEN2_GEN_MASK(0, 16)
......@@ -192,7 +189,6 @@
#define MDIO_PHYSID1_OUI_R(reg) WBGEN2_GEN_READ(reg, 0, 16)
/* definitions for register: MDIO PHY Identification Register 2 */
#define MDIO_PHYSID2_ADDRESS 0xc
/* definitions for field: Revision Number in reg: MDIO PHY Identification Register 2 */
#define MDIO_PHYSID2_REV_NUM_MASK WBGEN2_GEN_MASK(0, 4)
......@@ -213,7 +209,6 @@
#define MDIO_PHYSID2_OUI_R(reg) WBGEN2_GEN_READ(reg, 10, 6)
/* definitions for register: MDIO Auto-Negotiation Advertisement Register */
#define MDIO_ADVERTISE_ADDRESS 0x10
/* definitions for field: Reserved in reg: MDIO Auto-Negotiation Advertisement Register */
#define MDIO_ADVERTISE_RSVD3_MASK WBGEN2_GEN_MASK(0, 5)
......@@ -264,7 +259,6 @@
#define MDIO_ADVERTISE_NPAGE_R(reg) WBGEN2_GEN_READ(reg, 15, 1)
/* definitions for register: MDIO Auto-Negotiation Link Partner Ability Register */
#define MDIO_LPA_ADDRESS 0x14
/* definitions for field: Reserved in reg: MDIO Auto-Negotiation Link Partner Ability Register */
#define MDIO_LPA_RSVD3_MASK WBGEN2_GEN_MASK(0, 5)
......@@ -303,7 +297,6 @@
#define MDIO_LPA_NPAGE WBGEN2_GEN_MASK(15, 1)
/* definitions for register: MDIO Auto-Negotiation Expansion Register */
#define MDIO_EXPANSION_ADDRESS 0x18
/* definitions for field: Reserved in reg: MDIO Auto-Negotiation Expansion Register */
#define MDIO_EXPANSION_RSVD1_MASK WBGEN2_GEN_MASK(0, 1)
......@@ -330,7 +323,6 @@
#define MDIO_EXPANSION_RSVD2_R(reg) WBGEN2_GEN_READ(reg, 3, 13)
/* definitions for register: MDIO Extended Status Register */
#define MDIO_ESTATUS_ADDRESS 0x3c
/* definitions for field: Reserved in reg: MDIO Extended Status Register */
#define MDIO_ESTATUS_RSVD1_MASK WBGEN2_GEN_MASK(0, 12)
......@@ -363,7 +355,6 @@
#define MDIO_ESTATUS_1000_XFULL_R(reg) WBGEN2_GEN_READ(reg, 15, 1)
/* definitions for register: WhiteRabbit-specific Configuration Register */
#define MDIO_WR_ADDRESS 0x40
/* definitions for field: TX Calibration Pattern in reg: WhiteRabbit-specific Configuration Register */
#define MDIO_WR_SPEC_TX_CAL WBGEN2_GEN_MASK(0, 1)
......
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