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White Rabbit Network Interface Card
Commit 55c6a150 authored by Miguel Jimenez Lopez's avatar Miguel Jimenez Lopez
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dio: Added DIO ch0 input support and hold DIO ch0 output as 1-PPS dedicated… 

dio: Added DIO ch0 input support and hold DIO ch0 output as 1-PPS dedicated signal. Deleted PPS mode in DIO core
parent 7738ceef
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Showing with 26 additions and 21 deletions
modules/wrsw_dio/xwrsw_dio.vhd
View file @ 55c6a150
......@@ -617,12 +617,15 @@ begin
dio_pulse(i) <= '1' when dio_pulse_immed(i) = '1' else dio_pulse_prog(i);
dio_oe_n_o(i) <= dio_iomode_reg(c_IOMODE_NB*i+2);
dio_term_en_o(i) <= dio_iomode_reg(c_IOMODE_NB*i+3);
with dio_iomode_reg(c_IOMODE_NB*i+1 downto c_IOMODE_NB*i)
select dio_out_o(i) <=
gpio_out(c_IOMODE_NB*i) when "00", --GPIO out as also 4 bits per channel
dio_pulse(i) when "01",
--dio_pps_i when "10",
'1' when others; --Error output will stay at one (similar as GPIO set to one)
dio_out_o(i) <= gpio_out(c_IOMODE_NB*i) when dio_iomode_reg(c_IOMODE_NB*i+1 downto c_IOMODE_NB*i)="00" else dio_pulse(i);
--with dio_iomode_reg(c_IOMODE_NB*i+1 downto c_IOMODE_NB*i)
--select dio_out_o(i) <=
-- gpio_out(c_IOMODE_NB*i) when "00", --GPIO out as also 4 bits per channel
-- dio_pulse(i) when "01",
-- --dio_pps_i when "10",
-- '1' when others; --Error output will stay at one (similar as GPIO set to one)
end generate gen_pio_assignment;
dio_led_bot_o <= dio_iomode_reg(c_IOMODE_NB*0+3) OR
......@@ -818,8 +821,8 @@ begin
if rising_edge(clk_sys_i) then
-- Set default configuration for each channel at reset
if rst_n_i = '0' then
dio_iomode_reg(2*c_IOMODE_NB+3 downto 2*c_IOMODE_NB) <= "0010"; -- mode 2 p
dio_iomode_reg(3*c_IOMODE_NB+3 downto 3*c_IOMODE_NB) <= "0100"; -- mode 3 I
dio_iomode_reg(0*c_IOMODE_NB+3 downto 0*c_IOMODE_NB) <= "0000"; -- mode 0 0
dio_iomode_reg(3*c_IOMODE_NB+3 downto 3*c_IOMODE_NB) <= "0100"; -- mode 3 i
dio_iomode_reg(4*c_IOMODE_NB+3 downto 4*c_IOMODE_NB) <= "0110"; -- mode 4 C
else
-- Set up register iomode for each channel
......
top/specdio/wr_nic_dio_top.ucf
View file @ 55c6a150
......@@ -591,10 +591,10 @@ NET "dio_p_i[1]" IOSTANDARD=LVDS_25;
NET "dio_n_i[1]" LOC =T11;
NET "dio_n_i[1]" IOSTANDARD=LVDS_25;
# NET "dio_p_i[0]" LOC =C19;
# NET "dio_p_i[0]" IOSTANDARD=LVDS_25;
# NET "dio_n_i[0]" LOC =A19;
# NET "dio_n_i[0]" IOSTANDARD=LVDS_25;
NET "dio_p_i[0]" LOC =C19;
NET "dio_p_i[0]" IOSTANDARD=LVDS_25;
NET "dio_n_i[0]" LOC =A19;
NET "dio_n_i[0]" IOSTANDARD=LVDS_25;
NET "dio_led_top_o" LOC= AA12;
NET "dio_led_top_o" IOSTANDARD=LVCMOS25;
......
top/specdio/wr_nic_dio_top.vhd
View file @ 55c6a150
......@@ -537,7 +537,7 @@ architecture rtl of wr_nic_dio_top is
signal phy_loopen : std_logic;
signal dio_clk : std_logic;
signal dio_in : std_logic_vector(4 downto 1);
signal dio_in : std_logic_vector(4 downto 0); --ch0 in input mode added!
signal dio_out : std_logic_vector(4 downto 1);
--first channel is reserved for PPS out
signal dio_out_pps : std_logic;
......@@ -1192,12 +1192,12 @@ begin
--dio_pps_i => dio_out_pps, --CHECK
--Connect only the last 4 channels to not disturb pps_out
--and keep generic dio_core
dio_in_i(0) => open,
dio_in_i(4 downto 1) => dio_in,
-- dio_in_i(0) => open,
dio_in_i(4 downto 0) => dio_in,
dio_out_o(0) => open,
dio_out_o(4 downto 1) => dio_out,
dio_oe_n_o(0) => open,
dio_oe_n_o(4 downto 1) => dio_oe_n_o(4 downto 1),
--dio_oe_n_o(0) => open,
dio_oe_n_o(4 downto 0) => dio_oe_n_o(4 downto 0),
dio_term_en_o => dio_term_en_o,
dio_onewire_b => dio_onewire_b,
......@@ -1224,7 +1224,7 @@ begin
-- TRIG3 => TRIG3,
);
gen_dio_iobufs : for i in 1 to 4 generate
gen_dio_ibufs : for i in 0 to 4 generate
U_ibuf : IBUFDS
generic map (
DIFF_TERM => true)
......@@ -1233,17 +1233,19 @@ begin
I => dio_p_i(i),
IB => dio_n_i(i)
);
end generate gen_dio_ibufs;
gen_dio_obufs: for i in 1 to 4 generate
U_obuf : OBUFDS
port map (
I => dio_out(i),
O => dio_p_o(i),
OB => dio_n_o(i)
);
end generate gen_dio_iobufs;
end generate gen_dio_obufs;
-- first channel is reserved for PPS out only
dio_oe_n_o(0) <= '0';
-- first channel is reserved for PPS out only but it is controlled by DIO core!!
--dio_oe_n_o(0) <= '0';
U_obuf_pps : OBUFDS
port map (
......
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