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96418abd
Commit
96418abd
authored
Aug 07, 2013
by
Grzegorz Daniluk
Committed by
Benoit Rat
Oct 10, 2013
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wrsw_dio: fix default values of DIO configuration for GM mode
parent
acdfe07a
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xwrsw_dio.vhd
modules/wrsw_dio/xwrsw_dio.vhd
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modules/wrsw_dio/xwrsw_dio.vhd
View file @
96418abd
...
...
@@ -6,7 +6,7 @@
-- Author : Rafael Rodriguez, Javier Díaz
-- Company : Seven Solutions
-- Created : 2012-03-03
-- Last update: 201
2-03-20
-- Last update: 201
3-08-07
-- Platform : FPGA-generic
-- Standard : VHDL
-------------------------------------------------------------------------------
...
...
@@ -23,8 +23,8 @@
-- Date Version Author Description
-- 2012-03-03 0.1 Rafa.r Created
-- 2012-03-08 0.1 JDiaz Added wrsw_dio_wb
-- 2012-07-05 0.2
JDiaz Modified wrsw_dio_wb, modified interface
-- 2012-07-20 0.2
JDiaz Include sdb support
-- 2012-07-05 0.2
JDiaz Modified wrsw_dio_wb, modified interface
-- 2012-07-20 0.2
JDiaz Include sdb support
-------------------------------------------------------------------------------
-- Memory map:
-- 0x000: DIO-ONEWIRE
...
...
@@ -815,8 +815,8 @@ begin
-- Set default configuration for each channel at reset
if
rst_n_i
=
'0'
then
dio_iomode_reg
(
2
*
c_IOMODE_NB
+
3
downto
2
*
c_IOMODE_NB
)
<=
"0010"
;
-- mode 2 p
dio_iomode_reg
(
3
*
c_IOMODE_NB
+
3
downto
3
*
c_IOMODE_NB
)
<=
"
1
100"
;
-- mode 3 I
dio_iomode_reg
(
4
*
c_IOMODE_NB
+
3
downto
4
*
c_IOMODE_NB
)
<=
"
1
110"
;
-- mode 4 C
dio_iomode_reg
(
3
*
c_IOMODE_NB
+
3
downto
3
*
c_IOMODE_NB
)
<=
"
0
100"
;
-- mode 3 I
dio_iomode_reg
(
4
*
c_IOMODE_NB
+
3
downto
4
*
c_IOMODE_NB
)
<=
"
0
110"
;
-- mode 4 C
else
-- Set up register iomode for each channel
for
i
in
0
to
4
loop
...
...
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