remove unused I/Os and assign default values

5e7d55d6 · Grzegorz Daniluk · 1c33a80f · 5e7d55d6 · 5e7d55d6
Commit 5e7d55d6 authored Aug 09, 2019 by Grzegorz Daniluk
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Showing with 4 additions and 6 deletions

wrsw_top_pkg.vhd top/bare_top/wrsw_top_pkg.vhd +4 -4

scb_top_synthesis.ucf top/scb_8ports/scb_top_synthesis.ucf +0 -2

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--- a/top/bare_top/wrsw_top_pkg.vhd
+++ b/top/bare_top/wrsw_top_pkg.vhd
@@ -301,10 +301,10 @@ package wrsw_top_pkg is
      clk_ref_i           : in  std_logic;
      clk_dmtd_i          : in  std_logic;
      clk_aux_i           : in  std_logic;
-      clk_ext_mul_i       : in  std_logic;
-      clk_ext_mul_locked_i : in std_logic;
-      clk_ext_db_i        : in  std_logic;
-      ext_board_detected_i: in  std_logic;
+      clk_ext_mul_i       : in  std_logic := '0';
+      clk_ext_mul_locked_i : in std_logic := '0';
+      clk_ext_db_i        : in  std_logic := '0';
+      ext_board_detected_i: in  std_logic := '0';
      clk_sys_o           : out std_logic;
      cpu_wb_i            : in  t_wishbone_slave_in;
      cpu_wb_o            : out t_wishbone_slave_out;

--- a/top/scb_8ports/scb_top_synthesis.ucf
+++ b/top/scb_8ports/scb_top_synthesis.ucf
@@ -12,8 +12,6 @@ NET "fpga_clk_dmtd_n_i"  LOC=M22;

 NET "clk_aux_p_o" LOC=B20;
 NET "clk_aux_n_o" LOC=C19;
-NET "clk_500_o"   LOC=AM33;
-NET "clk_sys_dbg_o" LOC=AL33;

 NET "sensors_scl_b" LOC=G13;
 NET "sensors_sda_b" LOC=H14;