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White Rabbit Switch - Gateware
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White Rabbit Switch - Gateware
Commits
b1b621b9
Commit
b1b621b9
authored
Sep 13, 2018
by
Grzegorz Daniluk
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add bit to control WRS 1-PPS in termination
parent
fbf07e05
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9 changed files
with
27 additions
and
9 deletions
+27
-9
wr-cores
ip_cores/wr-cores
+1
-1
wrsw_rt_subsystem.vhd
modules/wrsw_rt_subsystem/wrsw_rt_subsystem.vhd
+5
-2
scb_top_bare.vhd
top/bare_top/scb_top_bare.vhd
+4
-2
wrsw_components_pkg.vhd
top/bare_top/wrsw_components_pkg.vhd
+1
-0
wrsw_top_pkg.vhd
top/bare_top/wrsw_top_pkg.vhd
+2
-0
scb_top_synthesis.ucf
top/scb_18ports/scb_top_synthesis.ucf
+2
-0
scb_top_synthesis.vhd
top/scb_18ports/scb_top_synthesis.vhd
+5
-2
scb_top_synthesis.ucf
top/scb_8ports/scb_top_synthesis.ucf
+2
-0
scb_top_synthesis.vhd
top/scb_8ports/scb_top_synthesis.vhd
+5
-2
No files found.
wr-cores
@
489a88b2
Subproject commit
3c2a6c72fd6e6c1594212b03d75ed2c8863cb8b3
Subproject commit
489a88b2ccd1893b1d4401ba63fdaefc8e32bf04
modules/wrsw_rt_subsystem/wrsw_rt_subsystem.vhd
View file @
b1b621b9
...
...
@@ -94,8 +94,9 @@ entity wrsw_rt_subsystem is
-- TSCs are in sync with the master time counter and the timestamps are correct).
pps_valid_o
:
out
std_logic
;
pps_ext_i
:
in
std_logic
;
-- external PPS input (from the front panel)
pps_ext_o
:
out
std_logic
;
-- external PPS output (to the front panel)
pps_ext_i
:
in
std_logic
;
-- external PPS input (from the front panel)
ppsin_term_o
:
out
std_logic
;
-- 50Ohm termination enable for 1-PPS in
pps_ext_o
:
out
std_logic
;
-- external PPS output (to the front panel)
sel_clk_sys_o
:
out
std_logic
;
-- system clock selection: 0 = startup
-- clock, 1 = PLL clock
...
...
@@ -180,6 +181,7 @@ architecture rtl of wrsw_rt_subsystem is
slave_i
:
in
t_wishbone_slave_in
;
slave_o
:
out
t_wishbone_slave_out
;
pps_in_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_csync_o
:
out
std_logic
;
pps_out_o
:
out
std_logic
;
pps_valid_o
:
out
std_logic
;
...
...
@@ -384,6 +386,7 @@ begin -- rtl
slave_i
=>
cnx_master_out
(
c_SLAVE_PPSGEN
),
slave_o
=>
cnx_master_in
(
c_SLAVE_PPSGEN
),
pps_in_i
=>
pps_ext_i
,
ppsin_term_o
=>
ppsin_term_o
,
pps_csync_o
=>
pps_csync
,
pps_out_o
=>
pps_ext_o
,
pps_valid_o
=>
pps_valid
,
...
...
top/bare_top/scb_top_bare.vhd
View file @
b1b621b9
...
...
@@ -104,8 +104,9 @@ entity scb_top_bare is
-- Timing I/O
-------------------------------------------------------------------------------
pps_i
:
in
std_logic
;
pps_o
:
out
std_logic
;
pps_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
-- 50Ohm termination enable for 1-PPS in
pps_o
:
out
std_logic
;
-- DAC Drive
dac_helper_sync_n_o
:
out
std_logic
;
...
...
@@ -537,6 +538,7 @@ begin
pps_csync_o
=>
pps_csync
,
pps_valid_o
=>
pps_valid
,
pps_ext_i
=>
pps_i
,
ppsin_term_o
=>
ppsin_term_o
,
pps_ext_o
=>
pps_o_predelay
,
sel_clk_sys_o
=>
sel_clk_sys
,
...
...
top/bare_top/wrsw_components_pkg.vhd
View file @
b1b621b9
...
...
@@ -153,6 +153,7 @@ package wrsw_components_pkg is
slave_i
:
in
t_wishbone_slave_in
;
slave_o
:
out
t_wishbone_slave_out
;
pps_in_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_csync_o
:
out
std_logic
;
pps_out_o
:
out
std_logic
;
tm_utc_o
:
out
std_logic_vector
(
39
downto
0
);
...
...
top/bare_top/wrsw_top_pkg.vhd
View file @
b1b621b9
...
...
@@ -153,6 +153,7 @@ package wrsw_top_pkg is
slave_i
:
in
t_wishbone_slave_in
;
slave_o
:
out
t_wishbone_slave_out
;
pps_in_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_csync_o
:
out
std_logic
;
pps_out_o
:
out
std_logic
;
tm_utc_o
:
out
std_logic_vector
(
39
downto
0
);
...
...
@@ -231,6 +232,7 @@ package wrsw_top_pkg is
pps_csync_o
:
out
std_logic
;
pps_valid_o
:
out
std_logic
;
pps_ext_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_ext_o
:
out
std_logic
;
sel_clk_sys_o
:
out
std_logic
;
ppsdel_tap_i
:
in
std_logic_vector
(
4
downto
0
)
:
=
(
others
=>
'0'
);
...
...
top/scb_18ports/scb_top_synthesis.ucf
View file @
b1b621b9
...
...
@@ -85,6 +85,8 @@ NET "cpu_data_b<0>" LOC="A33";
NET "pps_i" LOC="J25";
NET "ppsin_term_o" LOC="AL34";
NET "ppsin_term_o" IOSTANDARD="LVCMOS25";
NET "pps_o" LOC="U23";
NET "dac_helper_sync_n_o" LOC="AD17";
...
...
top/scb_18ports/scb_top_synthesis.vhd
View file @
b1b621b9
...
...
@@ -100,8 +100,9 @@ entity scb_top_synthesis is
-- Timing I/O
-------------------------------------------------------------------------------
pps_i
:
in
std_logic
;
pps_o
:
out
std_logic
;
pps_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
-- 50Ohm termination enable for 1-PPS in
pps_o
:
out
std_logic
;
-- DAC Drive
dac_helper_sync_n_o
:
out
std_logic
;
...
...
@@ -324,6 +325,7 @@ architecture Behavioral of scb_top_synthesis is
cpu_wb_o
:
out
t_wishbone_slave_out
;
cpu_irq_n_o
:
out
std_logic
;
pps_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_o
:
out
std_logic
;
dac_helper_sync_n_o
:
out
std_logic
;
dac_helper_sclk_o
:
out
std_logic
;
...
...
@@ -716,6 +718,7 @@ begin
cpu_wb_o
=>
top_master_in
,
cpu_irq_n_o
=>
cpu_irq_n_o
,
pps_i
=>
pps_i
,
ppsin_term_o
=>
ppsin_term_o
,
pps_o
=>
pps_o
,
dac_helper_sync_n_o
=>
dac_helper_sync_n_o
,
dac_helper_sclk_o
=>
dac_helper_sclk_o
,
...
...
top/scb_8ports/scb_top_synthesis.ucf
View file @
b1b621b9
...
...
@@ -94,6 +94,8 @@ NET "cpu_data_b<0>" LOC="A33";
NET "pps_i" LOC="J25";
NET "ppsin_term_o" LOC="AL34";
NET "ppsin_term_o" IOSTANDARD="LVCMOS25";
NET "pps_o" LOC="U23";
NET "dac_helper_sync_n_o" LOC="AD17";
...
...
top/scb_8ports/scb_top_synthesis.vhd
View file @
b1b621b9
...
...
@@ -103,8 +103,9 @@ entity scb_top_synthesis is
-- Timing I/O
-------------------------------------------------------------------------------
pps_i
:
in
std_logic
;
pps_o
:
out
std_logic
;
pps_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
-- 50Ohm termination enable for 1-PPS in
pps_o
:
out
std_logic
;
-- DAC Drive
dac_helper_sync_n_o
:
out
std_logic
;
...
...
@@ -333,6 +334,7 @@ architecture Behavioral of scb_top_synthesis is
cpu_wb_o
:
out
t_wishbone_slave_out
;
cpu_irq_n_o
:
out
std_logic
;
pps_i
:
in
std_logic
;
ppsin_term_o
:
out
std_logic
;
pps_o
:
out
std_logic
;
dac_helper_sync_n_o
:
out
std_logic
;
dac_helper_sclk_o
:
out
std_logic
;
...
...
@@ -731,6 +733,7 @@ begin
cpu_wb_o
=>
top_master_in
,
cpu_irq_n_o
=>
cpu_irq_n_o
,
pps_i
=>
pps_i
,
ppsin_term_o
=>
ppsin_term_o
,
pps_o
=>
pps_o
,
dac_helper_sync_n_o
=>
dac_helper_sync_n_o
,
dac_helper_sclk_o
=>
dac_helper_sclk_o
,
...
...
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