Skip to content

W
White Rabbit Switch - Gateware
Commit b5489272 authored by Mattia Rizzi's avatar Mattia Rizzi Committed by Grzegorz Daniluk
Browse files
Options

Modified synthesis configuration for 18ports build

parent 7d9971a2
Hide whitespace changes
Inline Side-by-side
Showing with 25 additions and 0 deletions
syn/scb_8ports/Runtime Reduction with Multi-Threading.xds 0 → 100644
View file @ b5489272
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<DesignStrategy goal="Minimum Runtime" strategy="Runtime Reduction with Multi-Threading" version="12.1">
<Description>This strategy will minimize runtime. This strategy will not optimize for timing performance.</Description>
<DeviceList devices="virtex6"/>
<Properties>
<property name="Synthesize - XST:Read Cores" value="false"/>
<property name="Map:Placer Effort Level" value="High"/>
<property name="Map:Placer Extra Effort" value="Normal"/>
<property name="Map:Starting Placer Cost Table (1-100)" value="40"/>
<property name="Map:Timing Mode" value="Performance Evaluation"/>
<property name="Map:Pack I/O Registers/Latches into IOBs" value="For Outputs Only"/>
<property name="Map:LUT Combining" value="Auto"/>
<property name="Map:Power Reduction" value="Off"/>
<property name="Map:Enable Multi-Threading" value="2"/>
<property name="Place &amp; Route:Place &amp; Route Effort Level (Overall)" value="High"/>
<property name="Place &amp; Route:Timing Mode" value="Performance Evaluation"/>
<property name="Place &amp; Route:Enable Multi-Threading" value="4"/>
<property name="Generate Programming File:Create Bit File" value="true"/>
<property name="Generate Programming File:Create Binary Configuration File" value="true"/>
</Properties>
</DesignStrategy>
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment