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White Rabbit Switch - Gateware
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White Rabbit Switch - Gateware
Commits
c3cddd41
Commit
c3cddd41
authored
Jul 05, 2013
by
Grzegorz Daniluk
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wrsw_nic: parameter to decide if fabric source should be able to initiate cycle when stall is high
parent
e8d3e8f3
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5 changed files
with
22 additions
and
8 deletions
+22
-8
nic_tx_fsm.vhd
modules/wrsw_nic/nic_tx_fsm.vhd
+6
-2
wrsw_nic.vhd
modules/wrsw_nic/wrsw_nic.vhd
+6
-3
xwrsw_nic.vhd
modules/wrsw_nic/xwrsw_nic.vhd
+6
-1
wrsw_components_pkg.vhd
top/bare_top/wrsw_components_pkg.vhd
+2
-1
wrsw_top_pkg.vhd
top/bare_top/wrsw_top_pkg.vhd
+2
-1
No files found.
modules/wrsw_nic/nic_tx_fsm.vhd
View file @
c3cddd41
...
...
@@ -32,6 +32,8 @@ use work.nic_wbgen2_pkg.all;
entity
nic_tx_fsm
is
generic
(
g_cyc_on_stall
:
boolean
:
=
false
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
@@ -112,7 +114,8 @@ architecture behavioral of nic_tx_fsm is
component
ep_rx_wb_master
generic
(
g_ignore_ack
:
boolean
);
g_ignore_ack
:
boolean
;
g_cyc_on_stall
:
boolean
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
@@ -177,7 +180,8 @@ begin -- behavioral
U_WB_Master
:
ep_rx_wb_master
generic
map
(
g_ignore_ack
=>
true
)
g_ignore_ack
=>
true
,
g_cyc_on_stall
=>
g_cyc_on_stall
)
port
map
(
clk_sys_i
=>
clk_sys_i
,
rst_n_i
=>
rst_n_i
,
...
...
modules/wrsw_nic/wrsw_nic.vhd
View file @
c3cddd41
...
...
@@ -10,7 +10,8 @@ entity wrsw_nic is
generic
(
g_interface_mode
:
t_wishbone_interface_mode
:
=
CLASSIC
;
g_address_granularity
:
t_wishbone_address_granularity
:
=
WORD
g_address_granularity
:
t_wishbone_address_granularity
:
=
WORD
;
g_src_cyc_on_stall
:
boolean
:
=
false
);
port
(
clk_sys_i
:
in
std_logic
;
...
...
@@ -76,7 +77,8 @@ architecture rtl of wrsw_nic is
component
xwrsw_nic
generic
(
g_interface_mode
:
t_wishbone_interface_mode
;
g_address_granularity
:
t_wishbone_address_granularity
);
g_address_granularity
:
t_wishbone_address_granularity
;
g_src_cyc_on_stall
:
boolean
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
@@ -108,7 +110,8 @@ begin
U_Wrapped_NIC
:
xwrsw_nic
generic
map
(
g_interface_mode
=>
g_interface_mode
,
g_address_granularity
=>
g_address_granularity
)
g_address_granularity
=>
g_address_granularity
,
g_src_cyc_on_stall
=>
g_src_cyc_on_stall
)
port
map
(
clk_sys_i
=>
clk_sys_i
,
rst_n_i
=>
rst_n_i
,
...
...
modules/wrsw_nic/xwrsw_nic.vhd
View file @
c3cddd41
...
...
@@ -16,7 +16,8 @@ entity xwrsw_nic is
generic
(
g_interface_mode
:
t_wishbone_interface_mode
:
=
CLASSIC
;
g_address_granularity
:
t_wishbone_address_granularity
:
=
WORD
g_address_granularity
:
t_wishbone_address_granularity
:
=
WORD
;
g_src_cyc_on_stall
:
boolean
:
=
false
);
port
(
clk_sys_i
:
in
std_logic
;
...
...
@@ -161,6 +162,8 @@ architecture rtl of xwrsw_nic is
end
component
;
component
nic_tx_fsm
generic
(
g_cyc_on_stall
:
boolean
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
@@ -490,6 +493,8 @@ begin -- rtl
U_TX_FSM
:
nic_tx_fsm
generic
map
(
g_cyc_on_stall
=>
g_src_cyc_on_stall
)
port
map
(
clk_sys_i
=>
clk_sys_i
,
rst_n_i
=>
nic_reset_n
,
...
...
top/bare_top/wrsw_components_pkg.vhd
View file @
c3cddd41
...
...
@@ -139,7 +139,8 @@ package wrsw_components_pkg is
component
xwrsw_nic
generic
(
g_interface_mode
:
t_wishbone_interface_mode
;
g_address_granularity
:
t_wishbone_address_granularity
);
g_address_granularity
:
t_wishbone_address_granularity
;
g_src_cyc_on_stall
:
boolean
:
=
false
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
top/bare_top/wrsw_top_pkg.vhd
View file @
c3cddd41
...
...
@@ -141,7 +141,8 @@ package wrsw_top_pkg is
component
xwrsw_nic
generic
(
g_interface_mode
:
t_wishbone_interface_mode
;
g_address_granularity
:
t_wishbone_address_granularity
);
g_address_granularity
:
t_wishbone_address_granularity
;
g_src_cyc_on_stall
:
boolean
:
=
false
);
port
(
clk_sys_i
:
in
std_logic
;
rst_n_i
:
in
std_logic
;
...
...
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