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White Rabbit Switch - Gateware
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White Rabbit Switch - Gateware
Commits
f7f16cfc
Commit
f7f16cfc
authored
Jan 13, 2021
by
Maciej Lipinski
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upated chipscipe (v3)
parent
9dbb5aea
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49 additions
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19 deletions
+49
-19
scb_top_bare.vhd
top/bare_top/scb_top_bare.vhd
+49
-19
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top/bare_top/scb_top_bare.vhd
View file @
f7f16cfc
...
...
@@ -445,34 +445,64 @@ begin
TRIG3
=>
TRIG3
);
-- rx wrong data
TRIG0
(
15
downto
0
)
<=
endpoint_snk_in
(
2
)
.
dat
;
TRIG0
(
17
downto
16
)
<=
endpoint_snk_in
(
2
)
.
adr
;
TRIG0
(
18
)
<=
endpoint_snk_in
(
2
)
.
cyc
;
TRIG0
(
19
)
<=
endpoint_snk_in
(
2
)
.
stb
;
TRIG0
(
20
)
<=
endpoint_snk_in
(
2
)
.
we
;
TRIG0
(
21
)
<=
std_logic
(
endpoint_snk_in
(
2
)
.
sel
(
0
)
xor
endpoint_snk_in
(
2
)
.
sel
(
1
));
TRIG0
(
22
)
<=
endpoint_snk_out
(
2
)
.
ack
;
TRIG0
(
23
)
<=
endpoint_snk_out
(
2
)
.
stall
;
TRIG0
(
24
)
<=
endpoint_snk_out
(
2
)
.
err
;
TRIG0
(
25
)
<=
endpoint_snk_out
(
2
)
.
rty
;
--TRIG0( 15 downto 0) <= endpoint_snk_in(3).dat;
-- TRIG0( 17 downto 16) <= endpoint_snk_in(3).adr;
-- TRIG0( 18) <= endpoint_snk_in(3).cyc;
-- TRIG0( 19) <= endpoint_snk_in(3).stb;
-- TRIG0( 20) <= endpoint_snk_in(3).we;
-- TRIG0( 21) <= std_logic(endpoint_snk_in(3).sel(0) xor endpoint_snk_in(3).sel(1));
-- TRIG0( 22) <= endpoint_snk_out(3).ack;
-- TRIG0( 23) <= endpoint_snk_out(3).stall;
-- TRIG0( 24) <= endpoint_snk_out(3).err;
-- TRIG0( 25) <= endpoint_snk_out(3).rty;
-- TRIG0( 26) <= phys_i(2).tx_disparity;
-- TRIG0( 27) <= phys_i(2).rx_enc_err;
-- TRIG0( 29 downto 28) <= phys_i(2).rx_k;
-- TRIG0( 31 downto 30) <= phys_i(2).rx_data(15 downto 14);
-- tx wrong data (hanging)
-- TRIG1( 15 downto 0) <= endpoint_src_out(2).dat;
-- TRIG1( 17 downto 16) <= endpoint_src_out(2).adr;
-- TRIG1( 18) <= endpoint_src_out(2).cyc;
-- TRIG1( 19) <= endpoint_src_out(2).stb;
-- TRIG1( 20) <= endpoint_src_out(2).we;
-- TRIG1( 21) <= std_logic(endpoint_snk_in(2).sel(0) xor endpoint_snk_in(2).sel(1));
-- TRIG1( 22) <= endpoint_src_in(2).ack;
-- TRIG1( 23) <= endpoint_src_in(2).stall;
-- TRIG1( 24) <= endpoint_src_in(2).err;
-- TRIG1( 25) <= endpoint_src_in(2).rty;
-- TRIG1( 31 downto 26) <= phys_i(2).rx_data(5 downto 0);
-- rx wrong data
TRIG0
(
15
downto
0
)
<=
endpoint_src_out
(
2
)
.
dat
;
TRIG0
(
17
downto
16
)
<=
endpoint_src_out
(
2
)
.
adr
;
TRIG0
(
18
)
<=
endpoint_src_out
(
2
)
.
cyc
;
TRIG0
(
19
)
<=
endpoint_src_out
(
2
)
.
stb
;
TRIG0
(
20
)
<=
endpoint_src_out
(
2
)
.
we
;
TRIG0
(
21
)
<=
std_logic
(
endpoint_src_out
(
2
)
.
sel
(
0
)
xor
endpoint_src_out
(
2
)
.
sel
(
1
));
TRIG0
(
22
)
<=
endpoint_src_in
(
2
)
.
ack
;
TRIG0
(
23
)
<=
endpoint_src_in
(
2
)
.
stall
;
TRIG0
(
24
)
<=
endpoint_src_in
(
2
)
.
err
;
TRIG0
(
25
)
<=
endpoint_src_in
(
2
)
.
rty
;
TRIG0
(
26
)
<=
phys_i
(
2
)
.
tx_disparity
;
TRIG0
(
27
)
<=
phys_i
(
2
)
.
rx_enc_err
;
TRIG0
(
29
downto
28
)
<=
phys_i
(
2
)
.
rx_k
;
TRIG0
(
31
downto
30
)
<=
phys_i
(
2
)
.
rx_data
(
15
downto
14
);
-- tx wrong data (hanging)
TRIG1
(
15
downto
0
)
<=
endpoint_s
rc_out
(
3
)
.
dat
;
TRIG1
(
17
downto
16
)
<=
endpoint_s
rc_out
(
3
)
.
adr
;
TRIG1
(
18
)
<=
endpoint_s
rc_out
(
3
)
.
cyc
;
TRIG1
(
19
)
<=
endpoint_s
rc_out
(
3
)
.
stb
;
TRIG1
(
20
)
<=
endpoint_s
rc_out
(
3
)
.
we
;
TRIG1
(
15
downto
0
)
<=
endpoint_s
nk_in
(
3
)
.
dat
;
TRIG1
(
17
downto
16
)
<=
endpoint_s
nk_in
(
3
)
.
adr
;
TRIG1
(
18
)
<=
endpoint_s
nk_in
(
3
)
.
cyc
;
TRIG1
(
19
)
<=
endpoint_s
nk_in
(
3
)
.
stb
;
TRIG1
(
20
)
<=
endpoint_s
nk_in
(
3
)
.
we
;
TRIG1
(
21
)
<=
std_logic
(
endpoint_snk_in
(
3
)
.
sel
(
0
)
xor
endpoint_snk_in
(
3
)
.
sel
(
1
));
TRIG1
(
22
)
<=
endpoint_s
rc_in
(
3
)
.
ack
;
TRIG1
(
23
)
<=
endpoint_s
rc_in
(
3
)
.
stall
;
TRIG1
(
24
)
<=
endpoint_s
rc_in
(
3
)
.
err
;
TRIG1
(
25
)
<=
endpoint_s
rc_in
(
3
)
.
rty
;
TRIG1
(
22
)
<=
endpoint_s
nk_out
(
3
)
.
ack
;
TRIG1
(
23
)
<=
endpoint_s
nk_out
(
3
)
.
stall
;
TRIG1
(
24
)
<=
endpoint_s
nk_out
(
3
)
.
err
;
TRIG1
(
25
)
<=
endpoint_s
nk_out
(
3
)
.
rty
;
TRIG1
(
31
downto
26
)
<=
phys_i
(
2
)
.
rx_data
(
5
downto
0
);
TRIG2
(
3
downto
0
)
<=
swc_wdog_out
(
2
)(
c_ALLOC_FSM_IDX
);
TRIG2
(
7
downto
4
)
<=
swc_wdog_out
(
2
)(
c_TRANS_FSM_IDX
);
TRIG2
(
11
downto
8
)
<=
swc_wdog_out
(
2
)(
c_RCV_FSM_IDX
);
...
...
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