rx pcs should accept preamble shrinkage
In some cases (depends on the transceiver implementation on the other side of the link) the preamble which is normally 6 bytes can be shrank to 5 bytes. More information about the reasons for preamble shrinkage can be found e.g. in Xilinx Ethernet PCS/PMA product guide
Although this situation with our TX PCS, we should be able to handle this on RX side to allow connecting various non-WR devices to the WR switch.