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Design Rule Verification Report

Date : 10/05/2012
Time : 13:11:13
Elapsed Time : 00:00:37
Filename : D:\White Rabbit\miniBackplane_SFP\miniBackplane.PcbDoc
Warnings : 0
Rule Violations : 21

Summary

Warnings Count
Total 0

Rule Violations Count
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 14
Clearance Constraint (Gap=0.2mm) (All),(All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) 0
Width Constraint (Min=0.2mm) (Max=1mm) (Preferred=0.5mm) (InNetClass('PWRs&GNDs')) 0
Component Clearance Constraint ( Horizontal Gap = 0.254mm, Vertical Gap = 0.254mm ) (All),(All) 0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) 0
Pads and Vias to follow the Drill pairs settings 0
Hole Size Constraint (Min=0.2mm) (Max=7mm) (All) 0
Differential Pairs Uncoupled Length using the Gap Constraints (Min=0.2mm) (Max=0.2mm) (Preferred=0.2mm) (All) 3
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.05mm) (All),(All) 0
Silkscreen Over Component Pads (Clearance=0.08mm) (All),(All) 3
Silk to Silk (Clearance=0.025mm) (All),(All) 1
Net Antennae (Tolerance=0mm) (All) 0
Width Constraint (Min=0.2mm) (Max=0.2mm) (Preferred=0.2mm) ((InDifferentialPairClass('All Differential Pairs'))) 0
Width Constraint (Min=0.2mm) (Max=1mm) (Preferred=0.2mm) (All) 0
Total 21

Un-Routed Net Constraint ( (All) )
Un-Routed Net Constraint: Net CHASSIS Between Pad C44-1 (3.83,22.374mm) And Pad C46-1 (34.73,24.574mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C50-1 (201.43,46.174mm) And Track on layer Top Layer (276.23,46.174mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C52-1 (280.63,46.074mm) And Track on layer Top Layer (355.405,46.174mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C49-1 (121.83,46.174mm) And Pad Free- (197.055,46.174mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C53-1 (359.53,46.374mm) And Track on layer Top Layer (434.58,46.174mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (434.58,126.474mm) And Pad C54-1 (434.73,50.974mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C50-1 (201.43,46.174mm) And Pad C43-1 (233.93,89.774mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (158.574,90.574mm) And Pad C43-1 (233.93,89.774mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C52-1 (280.63,46.074mm) And Pad C45-1 (317.03,86.574mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (38.88,24.674mm) And Track on layer Top Layer (38.88,105.974mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (237.85,90.6mm) And Track on layer Top Layer (249.28,165.32mm)
Un-Routed Net Constraint: Net CHASSIS Between Pad C47-1 (8.43,169.174mm) And Pad C41-1 (34.73,106.474mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (126.48,160.474mm) And Pad C42-1 (154.23,90.574mm)
Un-Routed Net Constraint: Net CHASSIS Between Track on layer Top Layer (38.88,24.674mm) And Track on layer Top Layer (117.88,46.174mm)
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Differential Pairs Uncoupled Length using the Gap Constraints (Min=0.2mm) (Max=0.2mm) (Preferred=0.2mm) (All)
Differential Pairs Routing Between Net USB_DDP_P And Net USB_DDP_N
Differential Pairs Routing Between Net MGTTX115_2_P And Net MGTTX115_2_N
Differential Pairs Routing Between Net MGTTX112_0_P And Net MGTTX112_0_N
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Silkscreen Over Component Pads (Clearance=0.08mm) (All),(All)
Track (222.155mm,162.66mm)(237.485mm,162.66mm) Top Overlay Pad J7-3(229.81mm,163.98mm) Multi-Layer
Track (222.155mm,162.66mm)(237.485mm,162.66mm) Top Overlay Pad J7-2(232.35mm,161.44mm) Multi-Layer
Track (222.155mm,162.66mm)(237.485mm,162.66mm) Top Overlay Pad J7-1(227.27mm,161.44mm) Multi-Layer
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Silk to Silk (Clearance=0.025mm) (All),(All)
Text "SE" (189.737mm,90.238mm) Top Overlay Track (194.755mm,94.554mm)(197.089mm,90.219mm) Top Overlay
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