From 95648bc0194a8a284b87b5555314f53e166a46f9 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Wed, 14 Sep 2011 11:23:29 +0200
Subject: [PATCH] wrs3 changes to g45ek

---
 arch/arm/mach-at91/board-sam9m10g45ek.c |   36 +++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 6c999db..d0e1e67 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -420,6 +420,42 @@ static void __init ek_board_init(void)
 	/* LEDs */
 	at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
 	at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+	{ /* Configure the EBI1 pins for the wr switch */
+		int i;
+
+		/* PC16..31: periphA as EBI1_D16..31 */
+		for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+			at91_set_A_periph(i, 0);
+		/* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+		at91_set_A_periph(AT91_PIN_PC2, 0);
+		at91_set_A_periph(AT91_PIN_PC3, 0);
+
+		/* FIXME: We should pull rst high for when it is programmed */
+
+		/* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+		at91_sys_write(AT91_SMC_SETUP(0),
+			       AT91_SMC_NWESETUP_(4) |
+			       AT91_SMC_NCS_WRSETUP_(2) |
+			       AT91_SMC_NRDSETUP_(4) |
+			       AT91_SMC_NCS_RDSETUP_(2));
+		at91_sys_write(AT91_SMC_PULSE(0),
+			       AT91_SMC_NWEPULSE_(30) |
+			       AT91_SMC_NCS_WRPULSE_(34) |
+			       AT91_SMC_NRDPULSE_(30) |
+			       AT91_SMC_NCS_RDPULSE_(34));
+		at91_sys_write(AT91_SMC_CYCLE(0),
+			       AT91_SMC_NWECYCLE_(40) |
+			       AT91_SMC_NRDCYCLE_(40));
+		at91_sys_write(AT91_SMC_MODE(0),
+			       AT91_SMC_DBW_32 |
+			       AT91_SMC_TDF_(0) |
+			       AT91_SMC_READMODE |
+			       AT91_SMC_WRITEMODE);
+
+
+	}
+
 }
 
 MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
-- 
1.7.0.4

