Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
W
White Rabbit Switch - Software
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
86
Issues
86
List
Board
Labels
Milestones
Merge Requests
4
Merge Requests
4
CI / CD
CI / CD
Pipelines
Schedules
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
White Rabbit Switch - Software
Commits
7f2ca82a
Commit
7f2ca82a
authored
Jun 07, 2019
by
Jean-Claude BAU
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
wr_date: Fix issue accessing the timing mode
parent
00e214e2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
13 additions
and
19 deletions
+13
-19
ppsi
userspace/ppsi
+1
-1
wr_date.c
userspace/tools/wr_date.c
+12
-18
No files found.
ppsi
@
3c27f391
Subproject commit
9b1ae8a387a078755e59b3df6a2b034dc464460c
Subproject commit
3c27f391927480457dff031cdc8ccb15eb046230
userspace/tools/wr_date.c
View file @
7f2ca82a
...
...
@@ -21,6 +21,7 @@
#include <libwr/softpll_export.h>
#include <libwr/util.h>
#include <time_lib.h>
#include <rt_ipc.h>
#ifndef MOD_TAI
#define MOD_TAI 0x80
...
...
@@ -506,26 +507,18 @@ int wrdate_internal_set_gm(volatile struct PPSG_WB *pps) {
return
0
;
}
#define SPLL_MAGIC 0x5b1157a7
#define FPGA_SPLL_STAT 0x10006800
int
getTimingMode
(
void
)
{
static
struct
spll_stats
*
spll_stats_p
;
static
int
connected
=
FALSE
;
struct
rts_pll_state
pstate
;
if
(
spll_stats_p
==
NULL
)
{
spll_stats_p
=
create_map
(
FPGA_SPLL_STAT
,
sizeof
(
*
spll_stats_p
));
if
(
spll_stats_p
==
NULL
)
{
fprintf
(
stderr
,
"Cannot create map to Soft Pll stats
\n
"
);
return
-
1
;
}
if
(
spll_stats_p
->
magic
!=
SPLL_MAGIC
)
{
/* Wrong magic */
fprintf
(
stderr
,
"Soft PLL: unknown magic %x (known is %x)
\n
"
,
spll_stats_p
->
magic
,
SPLL_MAGIC
);
if
(
!
connected
)
{
if
(
rts_connect
(
NULL
)
<
0
)
return
-
1
;
}
connected
=
TRUE
;
}
return
spll_stats_p
->
mode
;
if
(
rts_get_state
(
&
pstate
)
<
0
)
return
-
1
;
return
pstate
.
mode
;
}
/* Frontend to the set mechanism: parse the argument */
...
...
@@ -536,7 +529,8 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv)
struct
timeval
tv
;
if
(
!
strcmp
(
argv
[
0
],
"host"
))
{
switch
(
getTimingMode
())
{
int
tm
=
getTimingMode
();
switch
(
tm
)
{
case
SPLL_MODE_GRAND_MASTER
:
return
wrdate_internal_set_gm
(
pps
);
case
SPLL_MODE_FREE_RUNNING_MASTER
:
...
...
@@ -547,7 +541,7 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv)
fprintf
(
stderr
,
"Slave timing mode: WR time cannot be set!!!
\n
"
);
return
-
1
;
default:
fprintf
(
stderr
,
"Cannot read Soft PLL timing mode. WR time cannot be set
.
\n
"
);
fprintf
(
stderr
,
"Cannot read Soft PLL timing mode. WR time cannot be set
(ret=%d)
\n
"
,
tm
);
return
-
1
;
}
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment