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Commit 8ac0eedd authored by Benoit Rat's avatar Benoit Rat Committed by Alessandro Rubini
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at91boot: Correct clock bug during boot, add GPIOs, fix DRR config

parent 03a8c5fd
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patches/at91boot/v3.3/0001-board-9g45ek-fix-ddr-config-for-WRS-V3.patch deleted 100644 → 0
View file @ 03a8c5fd
From a0d26fd818f48c236d1f702b9735320bf227aa1d Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Thu, 15 Sep 2011 23:41:14 +0200
Subject: [PATCH] board 9g45ek: fix ddr config for WRS-V3
---
board/at91sam9g45ek/at91sam9g45ek.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/at91sam9g45ek/at91sam9g45ek.c b/board/at91sam9g45ek/at91sam9g45ek.c
index d6b10db..8569231 100644
--- a/board/at91sam9g45ek/at91sam9g45ek.c
+++ b/board/at91sam9g45ek/at91sam9g45ek.c
@@ -158,7 +158,7 @@ void ddramc_hw_init(void)
(AT91C_DDRC2_DBW_16_BITS | AT91C_DDRC2_MD_DDR2_SDRAM);
ddram_config.ddramc_cr = (AT91C_DDRC2_NC_DDR10_SDR9 | // 10 column bits (1K)
- AT91C_DDRC2_NR_14 | // 14 row bits (8K)
+ AT91C_DDRC2_NR_13 | // 13 row bits (8K)
AT91C_DDRC2_CAS_3 | // CAS Latency 3
AT91C_DDRC2_DLL_RESET_DISABLED); // DLL not reset
--
1.5.6.5
--- ./include/AT91SAM9G45_inc.h.orig 2012-03-05 23:42:32.000000000 +0100
+++ ./include/AT91SAM9G45_inc.h 2012-03-05 23:45:23.000000000 +0100
@@ -267,7 +267,7 @@
#define AT91C_DDRC2_NC_DDR10_SDR9 (0x1) // (HDDRSDRC2) DDR 10 Bits | SDR 9 Bits
#define AT91C_DDRC2_NC_DDR11_SDR10 (0x2) // (HDDRSDRC2) DDR 11 Bits | SDR 10 Bits
#define AT91C_DDRC2_NC_DDR12_SDR11 (0x3) // (HDDRSDRC2) DDR 12 Bits | SDR 11 Bits
-#define AT91C_DDRC2_NR (0x3 << 2) // (HDDRSDRC2) Number of Row Bits
+#define AT91C_DDRC2_NR AT91C_DDRC2_NR_13 // (HDDRSDRC2) Number of Row Bits
#define AT91C_DDRC2_NR_11 (0x0 << 2) // (HDDRSDRC2) 11 Bits
#define AT91C_DDRC2_NR_12 (0x1 << 2) // (HDDRSDRC2) 12 Bits
#define AT91C_DDRC2_NR_13 (0x2 << 2) // (HDDRSDRC2) 13 Bits
--- ./driver/ddramc.c.orig 2012-03-05 23:57:36.000000000 +0100
+++ ./driver/ddramc.c 2012-03-05 23:57:40.000000000 +0100
@@ -126,7 +126,7 @@
write_ddramc(ddram_controller_address, HDDRSDRC2_MR,
AT91C_DDRC2_MODE_EXT_LMR_CMD);
/* Perform a write access to DDR address so that BA[1] is set to 1 and BA[0] is set to 0. */
- *((unsigned int *)(ddram_address + (0x2 << ba_offset))) = 0;
+ *((unsigned int *)(ddram_address + 0x4000000 /* (0x2 << ba_offset) */)) = 0;
// wait 2 cycles min (of tCK) = 15 ns min
Wait(2);
@@ -135,7 +135,7 @@
/* Perform a write access to DDR address so that BA[1] is set to 1 and BA[0] is set to 1. */
write_ddramc(ddram_controller_address, HDDRSDRC2_MR,
AT91C_DDRC2_MODE_EXT_LMR_CMD);
- *((unsigned int *)(ddram_address + (0x3 << ba_offset))) = 0;
+ *((unsigned int *)(ddram_address + 0x6000000 /* (0x3 << ba_offset) */)) = 0;
// wait 2 cycles min (of tCK) = 15 ns min
Wait(2);
@@ -144,7 +144,7 @@
/* Perform a write access to DDR address so that BA[1] is set to 0 and BA[0] is set to 1. */
write_ddramc(ddram_controller_address, HDDRSDRC2_MR,
AT91C_DDRC2_MODE_EXT_LMR_CMD);
- *((unsigned int *)(ddram_address + (0x1 << ba_offset))) = 0;
+ *((unsigned int *)(ddram_address + 0x2000000 /* (0x1 << ba_offset) */)) = 0;
// wait 200 cycles min (of tCK) = 1500 ns min
Wait(100);
--- ./crt0_gnu.S.orig 2012-03-06 00:08:35.000000000 +0100
+++ ./crt0_gnu.S 2012-03-06 00:08:49.000000000 +0100
@@ -56,7 +56,7 @@
b swi_vector /* Software Interrupt */
b pabt_vector /* Prefetch Abort */
b dabt_vector /* Data Abort */
-.word _edata /* Size of the image for SAM-BA */
+.word _edata - _exception_vectors /* Size of the image for SAM-BA */
b irq_vector /* IRQ : read the AIC */
b fiq_vector /* FIQ */
patches/at91boot/v3.3/0001-printf-added-files-from-pptp-unchanged.patch 0 → 100644
View file @ 8ac0eedd
From 0e3b6a4cfc079d9217e7e1a9b3d4cae1c4f999c6 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 6 Mar 2012 10:18:59 +0100
Subject: [PATCH 1/7] printf: added files from pptp, unchanged
---
lib/diag-printf.c | 34 ++++++++++++++++++++++++++
lib/printf-mini.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 103 insertions(+)
create mode 100644 lib/diag-printf.c
create mode 100644 lib/printf-mini.c
diff --git a/lib/diag-printf.c b/lib/diag-printf.c
new file mode 100644
index 0000000..4f26782
--- /dev/null
+++ b/lib/diag-printf.c
@@ -0,0 +1,34 @@
+/*
+ * Basic printf based on vprintf based on vsprintf
+ *
+ * Alessandro Rubini for CERN, 2011 -- public domain
+ * (please note that the vsprintf is not public domain but GPL)
+ */
+#include <stdarg.h>
+#include <pptp/pptp.h>
+#include <pptp/diag.h>
+
+#define PP_BUF 128 /* We prefer small targets */
+
+static char print_buf[PP_BUF];
+
+int pp_vprintf(const char *fmt, va_list args)
+{
+ int ret;
+
+ ret = pp_vsprintf(print_buf, fmt, args);
+ pp_puts(print_buf);
+ return ret;
+}
+
+int pp_printf(const char *fmt, ...)
+{
+ va_list args;
+ int r;
+
+ va_start(args, fmt);
+ r = pp_vprintf(fmt, args);
+ va_end(args);
+
+ return r;
+}
diff --git a/lib/printf-mini.c b/lib/printf-mini.c
new file mode 100644
index 0000000..d68c848
--- /dev/null
+++ b/lib/printf-mini.c
@@ -0,0 +1,69 @@
+#include <stdarg.h>
+/*
+ * minimal vsprintf: only %s and hex values
+ * Alessandro Rubini 2010, based on code in u-boot (from older Linux)
+ * GNU GPL version 2.
+ */
+int pp_vsprintf(char *buf, const char *fmt, va_list args)
+{
+ int i, j;
+ static char hex[] = "0123456789abcdef";
+ char *s;
+ char *str = buf;
+
+ for (; *fmt ; ++fmt) {
+ if (*fmt != '%') {
+ *str++ = *fmt;
+ continue;
+ }
+
+ repeat:
+ fmt++; /* Skip '%' initially, other stuff later */
+
+ /* Skip the complete format string */
+ switch(*fmt) {
+ case '\0':
+ goto ret;
+ case '*':
+ /* should be precision, just eat it */
+ i = va_arg(args, int);
+ /* fall through: discard unknown stuff */
+ default:
+ goto repeat;
+
+ /* Special cases for conversions */
+
+ case 'c': /* char: supported */
+ *str++ = (unsigned char) va_arg(args, int);
+ break;
+ case 's': /* string: supported */
+ s = va_arg(args, char *);
+ while (*s)
+ *str++ = *s++;
+ break;
+ case 'n': /* number-thus-far: not supported */
+ break;
+ case '%': /* supported */
+ *str++ = '%';
+ break;
+
+ /* all integer (and pointer) are printed as <%08x> */
+ case 'o':
+ case 'x':
+ case 'X':
+ case 'd':
+ case 'i':
+ case 'u':
+ case 'p':
+ i = va_arg(args, int);
+ *str++ = '<';
+ for (j = 28; j >= 0; j -= 4)
+ *str++ = hex[(i>>j)&0xf];
+ *str++ = '>';
+ break;
+ }
+ }
+ ret:
+ *str = '\0';
+ return str - buf;
+}
--
1.7.9.5
patches/at91boot/v3.3/0002-printf-fixes-and-addition-to-makefile.patch 0 → 100644
View file @ 8ac0eedd
From 87fbc8c425b86d142060f2f8cc36ffbd5da42b5d Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 6 Mar 2012 10:37:27 +0100
Subject: [PATCH 2/7] printf: fixes and addition to makefile
---
include/pp_printf.h | 9 +++++++++
lib/diag-printf.c | 3 +--
lib/libc.mk | 3 +++
lib/printf-mini.c | 1 +
main.c | 1 +
5 files changed, 15 insertions(+), 2 deletions(-)
create mode 100644 include/pp_printf.h
diff --git a/include/pp_printf.h b/include/pp_printf.h
new file mode 100644
index 0000000..6ceca25
--- /dev/null
+++ b/include/pp_printf.h
@@ -0,0 +1,9 @@
+/* prototypes for the mini printf, copied from pptp */
+
+#include <stdarg.h>
+
+int pp_vprintf(const char *fmt, va_list args);
+int pp_printf(const char *fmt, ...);
+int pp_vsprintf(char *buf, const char *fmt, va_list args);
+
+#define pp_puts dbgu_print
diff --git a/lib/diag-printf.c b/lib/diag-printf.c
index 4f26782..07a1d78 100644
--- a/lib/diag-printf.c
+++ b/lib/diag-printf.c
@@ -5,8 +5,7 @@
* (please note that the vsprintf is not public domain but GPL)
*/
#include <stdarg.h>
-#include <pptp/pptp.h>
-#include <pptp/diag.h>
+#include <pp_printf.h>
#define PP_BUF 128 /* We prefer small targets */
diff --git a/lib/libc.mk b/lib/libc.mk
index 219e55b..a79c4bd 100644
--- a/lib/libc.mk
+++ b/lib/libc.mk
@@ -7,6 +7,9 @@ COBJS-y += $(LIBC)string.o
COBJS-y += $(LIBC)div0.o
COBJS-y += $(LIBC)udiv.o
COBJS-y += $(LIBC)eabi_utils.o
+COBJS-y += $(LIBC)printf-mini.o
+COBJS-y += $(LIBC)diag-printf.o
+
SOBJS-y += $(LIBC)_udivsi3.o
SOBJS-y += $(LIBC)_umodsi3.o
diff --git a/lib/printf-mini.c b/lib/printf-mini.c
index d68c848..0c0ea73 100644
--- a/lib/printf-mini.c
+++ b/lib/printf-mini.c
@@ -1,4 +1,5 @@
#include <stdarg.h>
+#include <pp_printf.h>
/*
* minimal vsprintf: only %s and hex values
* Alessandro Rubini 2010, based on code in u-boot (from older Linux)
diff --git a/main.c b/main.c
index 2a46204..8810324 100644
--- a/main.c
+++ b/main.c
@@ -30,6 +30,7 @@
* Creation : ODi Apr 19th 2006
*-----------------------------------------------------------------------------
*/
+#include <pp_printf.h>
#include "part.h"
#include "main.h"
#include "dbgu.h"
--
1.7.9.5
patches/at91boot/v3.3/0003-build-Add-gitversion-to-binary-and-a-script-to-compi.patch 0 → 100644
View file @ 8ac0eedd
From bf0cd9a0b72047cb7104316bcaaf7687e3d385c3 Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com>
Date: Fri, 23 Mar 2012 13:42:57 +0100
Subject: [PATCH 3/7] build: Add gitversion to binary, and a script to compile
DF & NF
---
.gitignore | 4 ++++
Makefile | 25 ++++++++++++++++++++++++-
build.sh | 21 +++++++++++++++++++++
main.c | 6 ++++++
4 files changed, 55 insertions(+), 1 deletion(-)
create mode 100755 build.sh
diff --git a/.gitignore b/.gitignore
index d78652e..69a0676 100644
--- a/.gitignore
+++ b/.gitignore
@@ -12,6 +12,8 @@ config/zconf.tab.o
config/.depend
.config.cmd
.config.old
+.cproject
+.project
.auto.deps
build
result
@@ -21,3 +23,5 @@ binaries
*.o
tags
*.swp
+.tmpconfig*
+version.c
diff --git a/Makefile b/Makefile
index 6216632..88dfffc 100644
--- a/Makefile
+++ b/Makefile
@@ -220,7 +220,7 @@ include driver/driver.mk
SRCS := $(COBJS-y:.o=.c)
-OBJS := $(SOBJS-y) $(COBJS-y)
+OBJS := $(SOBJS-y) $(COBJS-y) version.o
INCL=board/$(BOARD)
@@ -273,6 +273,29 @@ PHONY:=all gen_bin
all: PrintFlags gen_bin ChkFileSize
+## If not git is found
+ifeq ($(shell git status -s | grep -v "fatal*"),)
+version.c: $(SOBJS-y) $(COBJS-y)
+ @echo "/**" > $@
+ @echo " * File automatically generated by Makefile (DO NOT MODIFIED)\n *\n * To use this you in a c code just add the following lines:\n * " >> $@
+ @echo "\textern const char build_time[];\n\textern const char git_user[];\n\textren const char git_revision[];\n * " >> $@
+ @echo "**/" >> $@
+ @echo 'const char build_time[] = __DATE__ " @ " __TIME__ ;' >> $@
+ @echo "const char git_user[] = \"$(shell id -nu)\";" >> $@
+ @echo "const char git_revision[] = \"\";" >> $@
+ @echo "" >> $@
+else
+version.c: $(SOBJS-y) $(COBJS-y) .git/HEAD .git/index Makefile
+ @echo "/**" > $@
+ @echo " * File automatically generated by Makefile (DO NOT MODIFIED)\n *\n * To use this you in a c code just add the following lines:\n * " >> $@
+ @echo "\textern const char build_time[];\n\textern const char git_user[];\n\textren const char git_revision[];\n * " >> $@
+ @echo "**/" >> $@
+ @echo 'const char build_time[] = __DATE__ " @ " __TIME__ ;' >> $@
+ @echo "const char git_user[] = \"$(shell git config --get user.name)\";" >> $@
+ @echo "const char git_revision[] = \"$(shell git log --abbrev-commit --pretty=oneline -1 . | cut -d" " -f1)$(shell if git status -s > /dev/null; then echo '+'; else echo ''; fi;)\";" >> $@
+ @echo "" >> $@
+endif
+
PrintFlags:
@echo as FLAGS
@echo ========
diff --git a/build.sh b/build.sh
new file mode 100755
index 0000000..a9711d9
--- /dev/null
+++ b/build.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+
+showhelp()
+{
+ echo "Usage: $0 [options]"
+ echo "options:"
+ echo " --help: show this little help"
+ echo " --df: compile only for dataflash"
+ echo " --nf: compile only for nandflash"
+}
+
+
+
+case "$1" in
+ --help) showhelp;;
+ --nf) yes "" | make at91sam9g45nf_defconfig > /dev/null; make;;
+ --df) yes "" | make at91sam9g45df_defconfig > /dev/null; make;;
+ *) yes "" | make at91sam9g45df_defconfig > /dev/null; make; yes "" | make at91sam9g45nf_defconfig > /dev/null; make;;
+esac
+
+
diff --git a/main.c b/main.c
index 8810324..0ea1716 100644
--- a/main.c
+++ b/main.c
@@ -83,6 +83,10 @@ void Wait(unsigned int count)
/*------------------------------------------------------------------------------*/
int main(void)
{
+ extern const char build_time[];
+ extern const char git_user[];
+ extern const char git_revision[];
+
/*
* ================== 1st step: Hardware Initialization =================
*
@@ -92,6 +96,8 @@ int main(void)
hw_init();
#endif
+ pp_printf("Compiled by %s (%s)\r\ngit rev:%s\r\n\r\n",git_user,build_time,git_revision);
+
#ifdef CONFIG_USER_HW_INIT
user_hw_init();
#endif
--
1.7.9.5
patches/at91boot/v3.3/0004-board-9g45ek-fix-ddr-config-for-WRS-V3.patch 0 → 100644
View file @ 8ac0eedd
From cd82fb01d1f177bb0d15d5c92897fb1077c8b9e8 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Thu, 15 Sep 2011 23:41:14 +0200
Subject: [PATCH 4/7] board 9g45ek: fix ddr config for WRS-V3
---
board/at91sam9g45ek/at91sam9g45ek.c | 34 ++++++++++++++++++----------------
crt0_gnu.S | 2 +-
driver/ddramc.c | 14 ++++++++++----
include/AT91SAM9G45_inc.h | 5 ++++-
include/DDR2_MT47H_inc.h | 35 +++++++++++++++++++++++++++++++++++
include/ddramc.h | 2 +-
6 files changed, 69 insertions(+), 23 deletions(-)
create mode 100644 include/DDR2_MT47H_inc.h
diff --git a/board/at91sam9g45ek/at91sam9g45ek.c b/board/at91sam9g45ek/at91sam9g45ek.c
index d6b10db..85e7acf 100644
--- a/board/at91sam9g45ek/at91sam9g45ek.c
+++ b/board/at91sam9g45ek/at91sam9g45ek.c
@@ -140,7 +140,7 @@ void hw_init(void)
/*
* Configure DDRAM Controller
*/
- ddramc_hw_init();
+ ddramc_hw_init();
#endif /* CONFIG_DDR2 */
}
#endif /* CONFIG_HW_INIT */
@@ -152,36 +152,38 @@ static SDdramConfig ddram_config;
/* \fn ddramc_hw_init */
/* \brief This function performs DDRAMC HW initialization */
/*------------------------------------------------------------------------------*/
-void ddramc_hw_init(void)
+
+
+void ddramc_hw_init()
{
ddram_config.ddramc_mdr =
(AT91C_DDRC2_DBW_16_BITS | AT91C_DDRC2_MD_DDR2_SDRAM);
- ddram_config.ddramc_cr = (AT91C_DDRC2_NC_DDR10_SDR9 | // 10 column bits (1K)
- AT91C_DDRC2_NR_14 | // 14 row bits (8K)
+ ddram_config.ddramc_cr = (AT91C_DDRC2_NC_XX | // see include/DDR2_MT47H_inc.h
+ AT91C_DDRC2_NR_XX | // see include/DDR2_MT47H_inc.h
AT91C_DDRC2_CAS_3 | // CAS Latency 3
AT91C_DDRC2_DLL_RESET_DISABLED); // DLL not reset
ddram_config.ddramc_rtr = 0x24B;
- ddram_config.ddramc_t0pr = (AT91C_DDRC2_TRAS_6 | // 6 * 7.5 = 45 ns
- AT91C_DDRC2_TRCD_2 | // 2 * 7.5 = 22.5 ns
- AT91C_DDRC2_TWR_2 | // 2 * 7.5 = 15 ns
- AT91C_DDRC2_TRC_8 | // 8 * 7.5 = 75 ns
- AT91C_DDRC2_TRP_2 | // 2 * 7.5 = 22.5 ns
- AT91C_DDRC2_TRRD_1 | // 1 * 7.5 = 7.5 ns
- AT91C_DDRC2_TWTR_1 | // 1 clock cycle
- AT91C_DDRC2_TMRD_2); // 2 clock cycles
+ ddram_config.ddramc_t0pr = (AT91C_DDRC2_TRAS_6 | // 6 * 7.5 = 45 ns
+ AT91C_DDRC2_TRCD_2 | // 2 * 7.5 = 15 ns
+ AT91C_DDRC2_TWR_2 | // 2 * 7.5 = 15 ns
+ AT91C_DDRC2_TRC_8 | // 8 * 7.5 = 75 ns
+ AT91C_DDRC2_TRP_2 | // 2 * 7.5 = 22.5 ns
+ AT91C_DDRC2_TRRD_XX | // see include/DDR2_MT47H_inc.h
+ AT91C_DDRC2_TWTR_1 | // 1 clock cycle
+ AT91C_DDRC2_TMRD_2); // 2 clock cycles
ddram_config.ddramc_t1pr = (AT91C_DDRC2_TXP_2 | // 2 * 7.5 = 15 ns
200 << 16 | // 200 clock cycles, TXSRD: Exit self refresh delay to Read command
16 << 8 | // 16 * 7.5 = 120 ns TXSNR: Exit self refresh delay to non read command
AT91C_DDRC2_TRFC_14 << 0); // 14 * 7.5 = 142 ns (must be 140 ns for 1Gb DDR)
- ddram_config.ddramc_t2pr = (AT91C_DDRC2_TRTP_1 | // 1 * 7.5 = 7.5 ns
- AT91C_DDRC2_TRPA_0 | // 0 * 7.5 = 0 ns
- AT91C_DDRC2_TXARDS_7 | // 7 clock cycles
- AT91C_DDRC2_TXARD_2); // 2 clock cycles
+ ddram_config.ddramc_t2pr = (AT91C_DDRC2_TRTP_1 | // 1 * 7.5 = 7.5 ns
+ AT91C_DDRC2_TRPA_XX | // see include/DDR2_MT47H_inc.h
+ AT91C_DDRC2_TXARDS_XX | // see include/DDR2_MT47H_inc.h
+ AT91C_DDRC2_TXARD_2); // 2 clock cycles
// ENABLE DDR2 clock
writel(AT91C_PMC_DDR, AT91C_BASE_PMC + PMC_SCER);
diff --git a/crt0_gnu.S b/crt0_gnu.S
index df956d8..c00b717 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -56,7 +56,7 @@ _exception_vectors:
b swi_vector /* Software Interrupt */
b pabt_vector /* Prefetch Abort */
b dabt_vector /* Data Abort */
-.word _edata /* Size of the image for SAM-BA */
+.word _edata - _exception_vectors /* Size of the image for SAM-BA */
b irq_vector /* IRQ : read the AIC */
b fiq_vector /* FIQ */
diff --git a/driver/ddramc.c b/driver/ddramc.c
index 08eac28..f6fdfe8 100644
--- a/driver/ddramc.c
+++ b/driver/ddramc.c
@@ -75,10 +75,16 @@ int ddram_init(unsigned int ddram_controller_address,
ba_offset = (ddram_config->ddramc_cr & AT91C_DDRC2_NC) + 9; // number of column bits for DDR
if (ddram_decod_seq(ddram_config->ddramc_cr))
ba_offset += ((ddram_config->ddramc_cr & AT91C_DDRC2_NR) >> 2) + 11; // number of row bits
- ba_offset += (ddram_config->ddramc_mdr & AT91C_DDRC2_DBW) ? 1 : 2; // bus width
-
- dbg_log(3, " ba_offset = %x ... ", ba_offset);
-
+ ba_offset += (ddram_config->ddramc_mdr & AT91C_DDRC2_DBW) ? 1 : 2; // bus width
+
+ dbg_log(1,"DDR2 Config: %x (NC=%d, NR=%d, CAS=%d, ba_offset = %x)\n\r",
+ ddram_config->ddramc_cr ,
+ (ddram_config->ddramc_cr & AT91C_DDRC2_NC) + 9,
+ ((ddram_config->ddramc_cr & AT91C_DDRC2_NR) >> 2) + 11,
+ (ddram_config->ddramc_cr & AT91C_DDRC2_CAS) >> 4,
+ ba_offset
+ );
+
// Step 1: Program the memory device type
write_ddramc(ddram_controller_address, HDDRSDRC2_MDR,
ddram_config->ddramc_mdr);
diff --git a/include/AT91SAM9G45_inc.h b/include/AT91SAM9G45_inc.h
index 550aea4..a73fcd3 100644
--- a/include/AT91SAM9G45_inc.h
+++ b/include/AT91SAM9G45_inc.h
@@ -267,7 +267,7 @@
#define AT91C_DDRC2_NC_DDR10_SDR9 (0x1) // (HDDRSDRC2) DDR 10 Bits | SDR 9 Bits
#define AT91C_DDRC2_NC_DDR11_SDR10 (0x2) // (HDDRSDRC2) DDR 11 Bits | SDR 10 Bits
#define AT91C_DDRC2_NC_DDR12_SDR11 (0x3) // (HDDRSDRC2) DDR 12 Bits | SDR 11 Bits
-#define AT91C_DDRC2_NR (0x3 << 2) // (HDDRSDRC2) Number of Row Bits
+#define AT91C_DDRC2_NR (0x3 << 2) // (HDDRSDRC2) Number of Row Bits (MASK)
#define AT91C_DDRC2_NR_11 (0x0 << 2) // (HDDRSDRC2) 11 Bits
#define AT91C_DDRC2_NR_12 (0x1 << 2) // (HDDRSDRC2) 12 Bits
#define AT91C_DDRC2_NR_13 (0x2 << 2) // (HDDRSDRC2) 13 Bits
@@ -6350,3 +6350,6 @@
#define BOARD_SD_MCI_ID_USE 0
#define CHIP_SRAM0_BASEADDR 0x300000
+
+//Hacks to include our DDR without modifying the whole board
+#include "DDR2_MT47H_inc.h"
\ No newline at end of file
diff --git a/include/DDR2_MT47H_inc.h b/include/DDR2_MT47H_inc.h
new file mode 100644
index 0000000..75b3af3
--- /dev/null
+++ b/include/DDR2_MT47H_inc.h
@@ -0,0 +1,35 @@
+/**
+* Small hacks to make the at91bootstrap works with our DDR memories
+*
+* Author: Benoit RAT
+*
+**/
+#ifndef WRS318V3
+#define WRS318V3 1 //Version 3.1
+
+#define MT47H32M16HR 0x025E
+#ifdef MT47H32M16HR
+ //Then define new value
+ #define AT91C_DDRC2_NC_XX AT91C_DDRC2_NC_DDR10_SDR9 // 10 column bits (1K)
+ #define AT91C_DDRC2_NR_XX AT91C_DDRC2_NR_13 // 13 row bits (8K)
+ #define AT91C_DDRC2_TRRD_XX AT91C_DDRC2_TRRD_2 // 2 * 7.5 > 10 ns
+
+ #if MT47H32M16HR == 0x025E //for -25E
+ #define AT91C_DDRC2_TRPA_XX AT91C_DDRC2_TRPA_2 // 2 * 7.5 = 15 ns
+ #define AT91C_DDRC2_TXARDS_XX AT91C_DDRC2_TXARDS_8 //
+ #endif
+
+ #if MT47H32M16HR == 0x0030 //for -3
+ #define AT91C_DDRC2_TRPA_XX AT91C_DDRC2_TRPA_3 // 3 * 7.5 = 22.5 ns
+ #define AT91C_DDRC2_TXARDS_XX AT91C_DDRC2_TXARDS_7 //
+ #endif
+#else //Original values for AT
+ #define AT91C_DDRC2_NC_XX AT91C_DDRC2_NC_DDR10_SDR9 // 10 column bits (1K)
+ #define AT91C_DDRC2_NR_XX AT91C_DDRC2_NR_13
+ #define AT91C_DDRC2_TRPA_XX AT91C_DDRC2_TRPA_0
+ #define AT91C_DDRC2_TXARDS_XX AT91C_DDRC2_TXARDS_7
+ #define AT91C_DDRC2_TRRD_XX AT91C_DDRC2_TRRD_1
+#endif
+
+
+#endif
\ No newline at end of file
diff --git a/include/ddramc.h b/include/ddramc.h
index 3e7a30a..527436f 100644
--- a/include/ddramc.h
+++ b/include/ddramc.h
@@ -45,6 +45,6 @@ typedef struct SDdramConfig {
extern int ddram_init(unsigned int ddram_controller_address,
unsigned int ddram_address,
struct SDdramConfig *ddram_config);
-extern void ddramc_hw_init(void);
+extern void ddramc_hw_init();
#endif /*SDRAMC_H_ */
--
1.7.9.5
patches/at91boot/v3.3/0005-boot-disable-watchdog-asap-added-flip_leds-count-run.patch 0 → 100644
View file @ 8ac0eedd
From ca584e0c39e72e21bc570c4f5e8d90b91b1c3041 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 10 Apr 2012 13:00:22 +0200
Subject: [PATCH 5/7] boot: disable watchdog asap, added flip_leds(count) &
run test pattern (assembler)
---
crt0_gnu.S | 43 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/crt0_gnu.S b/crt0_gnu.S
index c00b717..bc54989 100644
--- a/crt0_gnu.S
+++ b/crt0_gnu.S
@@ -74,6 +74,34 @@ irq_vector:
b irq_vector
fiq_vector:
b fiq_vector
+
+/*
+ * First of all, write a procedure, that can be called from C or asm,
+ * to flip leds a number of times, after a small delay
+ */
+flip_leds: /* input: r0 is the count of flips */
+
+ /* a delay */
+ ldr r1, =200
+1: subs r1, r1, #1
+ bne 1b
+
+ ldr r1, =0xfffff200 /* PIOA */
+ mov r2, #3 /* bit 0 and 1: both leds */
+
+ str r2, [r1] /* enable */
+ str r2, [r1, #0x10] /* output enable */
+ cmp r0, #0
+ beq 2f
+0: str r2, [r1, #0x34] /* output clear (led on) */
+ str r2, [r1, #0x30] /* output set (led off) */
+ subs r0, r0, #1
+ bne 0b
+
+2: bx lr
+
+.ltorg
+
reset_vector:
/* Init the stack */
@@ -105,10 +133,25 @@ _relocate_to_sram:
ldr pc, =_setup_clocks
#endif /* CONFIG_FLASH */
+ /* disable watchdog */
+ ldr r1, =0xFFFFFD44
+ mov r2, #0x00008000
+ str r2, [r1]
+
+ /* test 4x the flip_leds procedure */
+ mov r0, #0x4
+ bl flip_leds
+
+ /* Call the lowlevel clock init function in ./driver/pmc.c */
ldr r4, = lowlevel_clock_init
mov lr, pc
bx r4
+ /* test 8x the flip_leds procedure */
+ mov r0, #0x8
+ bl flip_leds
+
+
#if 0
_setup_clocks:
/* Test if main oscillator is enabled */
--
1.7.9.5
patches/at91boot/v3.3/0006-boot-Correct-crash-due-to-an-Atmel-bug-during-boot-w.patch 0 → 100644
View file @ 8ac0eedd
From 34ac818a10d6b2d464ed1f49189e5fb78c5035d9 Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com>
Date: Wed, 11 Apr 2012 17:25:28 +0200
Subject: [PATCH 6/7] boot: Correct crash due to an Atmel bug during boot when
PLL clock is already used as master clock
---
driver/pmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver/pmc.c b/driver/pmc.c
index 1a09b9c..189d1c9 100644
--- a/driver/pmc.c
+++ b/driver/pmc.c
@@ -96,7 +96,7 @@ void lowlevel_clock_init()
/*
* After stablization, switch to 12MHz Main Oscillator
*/
- if ((read_pmc(PMC_MCKR) & AT91C_PMC_CSS) != AT91C_PMC_CSS_SLOW_CLK) {
+ if ((read_pmc(PMC_MCKR) & AT91C_PMC_CSS) == AT91C_PMC_CSS_SLOW_CLK) {
write_pmc(PMC_MCKR, AT91C_PMC_CSS_MAIN_CLK | AT91C_PMC_PRES_CLK);
while (!(read_pmc(PMC_SR) & AT91C_PMC_MCKRDY))
;
--
1.7.9.5
patches/at91boot/v3.3/0007-gpios-Correct-FPGA-LED-problems-and-add-CPU-LEDs-FAN.patch 0 → 100644
View file @ 8ac0eedd
From 418888f7482ecfdbb106e70924dba33ef0b3d911 Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com>
Date: Wed, 11 Jul 2012 10:41:00 +0200
Subject: [PATCH 7/7] gpios: Correct FPGA LED problems, and add CPU LEDs & FAN
Box at startup
---
board/at91sam9g45ek/at91sam9g45ek.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/board/at91sam9g45ek/at91sam9g45ek.c b/board/at91sam9g45ek/at91sam9g45ek.c
index 85e7acf..30e7b57 100644
--- a/board/at91sam9g45ek/at91sam9g45ek.c
+++ b/board/at91sam9g45ek/at91sam9g45ek.c
@@ -80,6 +80,26 @@ void hw_init(void)
};
/*
+ * Configure LED GPIOs
+ */
+ const struct pio_desc led_gpio[] = {
+ {"CPU_LED1", AT91C_PIN_PA(0), 0, PIO_OPENDRAIN, PIO_OUTPUT}, //Switch on CPU_LED1 when booting start.
+ {"CPU_LED2", AT91C_PIN_PA(1), 1, PIO_OPENDRAIN, PIO_OUTPUT}, //Setup CPU_LED2 such to use when the programs end loading.
+ {"FPGA_DONE", AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_INPUT}, //Setup FPGA LED Done in read mode
+ {"FPGA_INITB", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_INPUT}, //Setup FPGA LED Init in read mode
+ {"FPGA BUTTON", AT91C_PIN_PA(4), 0, PIO_DEFAULT, PIO_INPUT}, //Setup FPGA Button in read mode
+ {"ARM_BOOT_ALT", AT91C_PIN_PC(7), 1, PIO_PULLUP, PIO_INPUT}, //Alternative boot with ARM_BOOT_SEL_GPIO jumper in read mode (default is one)
+ {"FAN_BOX_TACH", AT91C_PIN_PE(7), 0, PIO_DEFAULT, PIO_INPUT}, //Setup FAN BOX tachometer in read mode
+ {"FAN_BOX_EN", AT91C_PIN_PB(20), 1, PIO_DEFAULT, PIO_OUTPUT}, //Turn on FAN BOX
+ {"FAN_BOX_EN", AT91C_PIN_PB(20), 1, PIO_PULLUP, PIO_INPUT} //Then setup in input PULLUP to lower the speed (R deviser)
+ };
+ pio_setup(led_gpio);
+
+
+ //Enable PIOA Clock in the PMC
+ writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
+
+ /*
* Disable watchdog
*/
writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
--
1.7.9.5
patches/at91boot/v3.3/README.md 0 → 100644
View file @ 8ac0eedd
Generation
============
These patches are generated using the following git:
<https://github.com/neub/wrs-sw-at91bootstrap/tree/patcheable-master>
and by executing:
git format-patch v3.3.0
However you can see the history of the development without any rebase by following:
<https://github.com/neub/wrs-sw-at91bootstrap/tree/master>
Application
=============
1. You first need to download the binary file: at91bootstrap-3-3.0.tar.gz
* Then you need to extract it to a folder, and go into it
* Initialize a git repo: `git init .`
* And finally you can apply the patches: git am 00*.patch
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