gnuplot -e"set xlabel 'time'; set y2label 'DAC value'; set ylabel 'Phase/freq error'; set yrange [-10000:10000]; set y2range [0:65540]; plot 'dmpll_plotdata.dat' using 1:2 title 'Phase/freq error' with lines axis x1y1, \
'dmpll_plotdata.dat' using 1:3 title 'DAC drive' with lines axis x1y2, \
'dmpll_plotdata.dat' using 1:4 title 'Freq/Phase mode' with lines axis x1y2; \
"
#, plot "dmpll_plotdata.dat" using 1:3 title "integral value" with lines, plot "dmpll_plotdata.dat" using 1:4 title "DAC drive" with lines'
/* Reset file pointer and parallel port registers */
fseek_rbf(finputid,0,S_SET);
fprintf(stdout,"\n***** Start configuration process *****\nPlease wait...\n");
/* Drive a transition of 0 to 1 to NCONFIG to indicate start of configuration */
Dump2Port(SIG_NCONFIG,0,0);
Dump2Port(SIG_NCONFIG,1,0);
/* Loop through every single byte */
for(i=0;i<file_size;i++)
{
/*one_byte = fgetc( (FILE*) finputid );*/
one_byte=fgetc_rbf(finputid);
/* Progaram a byte */
ProgramByte(one_byte);
/* Check for error through NSTATUS for every 10KB programmed and the last byte */
if(!(i%CHECK_EVERY_X_BYTE)||(i==file_size-1))
{
nstatus_ok=CheckSignal(SIG_NSTATUS);
if(!nstatus_ok)
{
PrintError(configuration_count-1);
program_done=0;
break;
}
else
program_done=1;
}
}
configuration_count--;
if(!program_done)
continue;
/* Configuration end */
/* Check CONF_DONE that indicates end of configuration */
confdone_ok=CheckSignal(SIG_CONFDONE);
if(confdone_ok)
{
fprintf(stderr,"Error: Configuration done but contains error... CONF_DONE is %s\n",(confdone_ok?"LOW":"HIGH"));
program_done=0;
PrintError(configuration_count);
if(configuration_count==0)
break;
}
/* if contain error during configuration, restart configuration */
if(!program_done)
continue;
/* program_done = 1; */
/* Start initialization */
/* Clock another extra DCLK cycles while initialization is in progress
through internal oscillator or driving clock cycles into CLKUSR pin */
/* These extra DCLK cycles do not initialize the device into USER MODE */
/* It is not required to drive extra DCLK cycles at the end of
configuration */
/* The purpose of driving extra DCLK cycles here is to insert some delay
while waiting for the initialization of the device to complete before
checking the CONFDONE and NSTATUS signals at the end of whole
configuration cycle */
for(i=0;i<INIT_CYCLE;i++)
{
Dump2Port(SIG_DCLK,0,0);
Dump2Port(SIG_DCLK,1,0);
}
/* Initialization end */
nstatus_ok=CheckSignal(SIG_NSTATUS);
confdone_ok=CheckSignal(SIG_CONFDONE);
if(!nstatus_ok||confdone_ok)
{
fprintf(stderr,"Error: Initialization finish but contains error: NSTATUS is %s and CONF_DONE is %s. Exiting...",(nstatus_ok?"HIGH":"LOW"),(confdone_ok?"LOW":"HIGH"));
program_done=0;
configuration_count=0;/* No reconfiguration */
}
}
/* Add another 'x' clock cycles while the device is in user mode.
This is not necessary and optional. Only used for debugging purposes */
if(clock_x_cycle>0)
{
fprintf(stdout,"Info: Clock another %d cycles in while device is in user mode...\n",clock_x_cycle);
for(i=0;i<CLOCK_X_CYCLE;i++)
{
Dump2Port(SIG_DCLK,0,0);
Dump2Port(SIG_DCLK,1,0);
}
}
if(!program_done)
{
fprintf(stderr,"\nError: Configuration not successful! Error encountered...\n");
fprintf(stderr,"Error: Error in configuration #%d... \nError: Maximum number of reconfiguration reached. Exiting...\n",(RECONF_COUNT_MAX-configuration_count));
else
{
fprintf(stderr,"Error: Error in configuration #%d... Restart configuration. Ready? <Press any key to continue>\n",(RECONF_COUNT_MAX-configuration_count));
/* Reset file pointer and parallel port registers */
fseek_rbf(finputid,0,S_SET);
fprintf(stdout,"\n***** Start configuration process *****\nPlease wait...\n");
/* Drive a transition of 0 to 1 to NCONFIG to indicate start of configuration */
Dump2Port(SIG_NCONFIG,0,0);
Dump2Port(SIG_NCONFIG,1,0);
/* Loop through every single byte */
for(i=0;i<file_size;i++)
{
/*one_byte = fgetc( (FILE*) finputid );*/
one_byte=fgetc_rbf(finputid);
/* Progaram a byte */
ProgramByte(one_byte);
/* Check for error through NSTATUS for every 10KB programmed and the last byte */
if(!(i%CHECK_EVERY_X_BYTE)||(i==file_size-1))
{
nstatus_ok=CheckSignal(SIG_NSTATUS);
if(!nstatus_ok)
{
PrintError(configuration_count-1);
program_done=0;
break;
}
else
program_done=1;
}
}
configuration_count--;
if(!program_done)
continue;
/* Configuration end */
/* Check CONF_DONE that indicates end of configuration */
confdone_ok=CheckSignal(SIG_CONFDONE);
if(confdone_ok)
{
fprintf(stderr,"Error: Configuration done but contains error... CONF_DONE is %s\n",(confdone_ok?"LOW":"HIGH"));
program_done=0;
PrintError(configuration_count);
if(configuration_count==0)
break;
}
/* if contain error during configuration, restart configuration */
if(!program_done)
continue;
/* program_done = 1; */
/* Start initialization */
/* Clock another extra DCLK cycles while initialization is in progress
through internal oscillator or driving clock cycles into CLKUSR pin */
/* These extra DCLK cycles do not initialize the device into USER MODE */
/* It is not required to drive extra DCLK cycles at the end of
configuration */
/* The purpose of driving extra DCLK cycles here is to insert some delay
while waiting for the initialization of the device to complete before
checking the CONFDONE and NSTATUS signals at the end of whole
configuration cycle */
for(i=0;i<INIT_CYCLE;i++)
{
Dump2Port(SIG_DCLK,0,0);
Dump2Port(SIG_DCLK,1,0);
}
/* Initialization end */
nstatus_ok=CheckSignal(SIG_NSTATUS);
confdone_ok=CheckSignal(SIG_CONFDONE);
if(!nstatus_ok||confdone_ok)
{
fprintf(stderr,"Error: Initialization finish but contains error: NSTATUS is %s and CONF_DONE is %s. Exiting...",(nstatus_ok?"HIGH":"LOW"),(confdone_ok?"LOW":"HIGH"));
program_done=0;
configuration_count=0;/* No reconfiguration */
}
}
/* Add another 'x' clock cycles while the device is in user mode.
This is not necessary and optional. Only used for debugging purposes */
if(clock_x_cycle>0)
{
fprintf(stdout,"Info: Clock another %d cycles in while device is in user mode...\n",clock_x_cycle);
for(i=0;i<CLOCK_X_CYCLE;i++)
{
Dump2Port(SIG_DCLK,0,0);
Dump2Port(SIG_DCLK,1,0);
}
}
if(!program_done)
{
fprintf(stderr,"\nError: Configuration not successful! Error encountered...\n");
fprintf(stderr,"Error: Error in configuration #%d... \nError: Maximum number of reconfiguration reached. Exiting...\n",(RECONF_COUNT_MAX-configuration_count));
else
{
fprintf(stderr,"Error: Error in configuration #%d... Restart configuration. Ready? <Press any key to continue>\n",(RECONF_COUNT_MAX-configuration_count));
gnuplot -e"set xlabel 'time'; set ylabel 'DAC value'; set y2label 'Phase/freq error'; set yrange [-10000:10000]; set y2range [0:65540]; plot 'hpll_plotdata.dat' using 1:2 title 'Phase/freq error' with lines axis x1y1, \
'hpll_plotdata.dat' using 1:3 title 'DAC drive' with lines axis x1y2, \
'hpll_plotdata.dat' using 1:4 title 'Freq/Phase mode' with lines axis x1y2; \
"
#, plot "hpll_plotdata.dat" using 1:3 title "integral value" with lines, plot "hpll_plotdata.dat" using 1:4 title "DAC drive" with lines'
if(tag)// user wants the frame tag for retreiving the timestamp: put it at the end of the frame data (ugly hack, but the current linux Timestamping API sucks anyway....)
